Home
last modified time | relevance | path

Searched refs:FIELD (Results 1 – 25 of 126) sorted by relevance

123456

/openbmc/qemu/include/hw/misc/
H A Dxlnx-zynqmp-crf.h18 FIELD(ERR_CTRL, SLVERR_ENABLE, 0, 1)
20 FIELD(IR_STATUS, ADDR_DECODE_ERR, 0, 1)
22 FIELD(IR_MASK, ADDR_DECODE_ERR, 0, 1)
24 FIELD(IR_ENABLE, ADDR_DECODE_ERR, 0, 1)
26 FIELD(IR_DISABLE, ADDR_DECODE_ERR, 0, 1)
28 FIELD(CRF_WPROT, ACTIVE, 0, 1)
30 FIELD(APLL_CTRL, POST_SRC, 24, 3)
31 FIELD(APLL_CTRL, PRE_SRC, 20, 3)
32 FIELD(APLL_CTRL, CLKOUTDIV, 17, 1)
33 FIELD(APLL_CTRL, DIV2, 16, 1)
[all …]
H A Dxlnx-versal-cfu.h35 FIELD(CFU_ISR, USR_GTS_EVENT, 9, 1)
36 FIELD(CFU_ISR, USR_GSR_EVENT, 8, 1)
37 FIELD(CFU_ISR, SLVERR, 7, 1)
38 FIELD(CFU_ISR, DECOMP_ERROR, 6, 1)
39 FIELD(CFU_ISR, BAD_CFI_PACKET, 5, 1)
40 FIELD(CFU_ISR, AXI_ALIGN_ERROR, 4, 1)
41 FIELD(CFU_ISR, CFI_ROW_ERROR, 3, 1)
42 FIELD(CFU_ISR, CRC32_ERROR, 2, 1)
43 FIELD(CFU_ISR, CRC8_ERROR, 1, 1)
44 FIELD(CFU_ISR, SEU_ENDOFCALIB, 0, 1)
[all …]
H A Dxlnx-versal-crl.h20 FIELD(ERR_CTRL, SLVERR_ENABLE, 0, 1)
22 FIELD(IR_STATUS, ADDR_DECODE_ERR, 0, 1)
24 FIELD(IR_MASK, ADDR_DECODE_ERR, 0, 1)
26 FIELD(IR_ENABLE, ADDR_DECODE_ERR, 0, 1)
28 FIELD(IR_DISABLE, ADDR_DECODE_ERR, 0, 1)
30 FIELD(WPROT, ACTIVE, 0, 1)
32 FIELD(PLL_CLK_OTHER_DMN, APLL_BYPASS, 0, 1)
34 FIELD(RPLL_CTRL, POST_SRC, 24, 3)
35 FIELD(RPLL_CTRL, PRE_SRC, 20, 3)
36 FIELD(RPLL_CTRL, CLKOUTDIV, 16, 2)
[all …]
H A Dxlnx-versal-cframe-reg.h39 FIELD(CRC, CRC, 0, 32)
44 FIELD(FAR0, SEGMENT, 23, 2)
45 FIELD(FAR0, BLOCKTYPE, 20, 3)
46 FIELD(FAR0, FRAME_ADDR, 0, 20)
51 FIELD(FAR_SFR0, BLOCKTYPE, 20, 3)
52 FIELD(FAR_SFR0, FRAME_ADDR, 0, 20)
61 FIELD(FRCNT0, FRCNT, 0, 32)
66 FIELD(CMD0, CMD, 0, 5)
75 FIELD(CTL, PER_FRAME_CRC, 0, 1)
80 FIELD(CFRM_ISR0, READ_BROADCAST_ERROR, 21, 1)
[all …]
H A Dstm32l4x5_rcc_internals.h32 FIELD(CR, PLLSAI2RDY, 29, 1)
33 FIELD(CR, PLLSAI2ON, 28, 1)
34 FIELD(CR, PLLSAI1RDY, 27, 1)
35 FIELD(CR, PLLSAI1ON, 26, 1)
36 FIELD(CR, PLLRDY, 25, 1)
37 FIELD(CR, PLLON, 24, 1)
38 FIELD(CR, CSSON, 19, 1)
39 FIELD(CR, HSEBYP, 18, 1)
40 FIELD(CR, HSERDY, 17, 1)
41 FIELD(CR, HSEON, 16, 1)
[all …]
H A Dxlnx-zynqmp-apu-ctrl.h22 FIELD(APU_ERR_CTRL, PSLVERR, 0, 1)
24 FIELD(ISR, INV_APB, 0, 1)
26 FIELD(IMR, INV_APB, 0, 1)
28 FIELD(IEN, INV_APB, 0, 1)
30 FIELD(IDS, INV_APB, 0, 1)
32 FIELD(CONFIG_0, CFGTE, 24, 4)
33 FIELD(CONFIG_0, CFGEND, 16, 4)
34 FIELD(CONFIG_0, VINITHI, 8, 4)
35 FIELD(CONFIG_0, AA64NAA32, 0, 4)
37 FIELD(CONFIG_1, L2RSTDISABLE, 29, 1)
[all …]
H A Dxlnx-versal-xramc.h21 FIELD(XRAM_ERR_CTRL, UE_RES, 3, 1)
22 FIELD(XRAM_ERR_CTRL, PWR_ERR_RES, 2, 1)
23 FIELD(XRAM_ERR_CTRL, PZ_ERR_RES, 1, 1)
24 FIELD(XRAM_ERR_CTRL, APB_ERR_RES, 0, 1)
26 FIELD(XRAM_ISR, INV_APB, 0, 1)
28 FIELD(XRAM_IMR, INV_APB, 0, 1)
30 FIELD(XRAM_IEN, INV_APB, 0, 1)
32 FIELD(XRAM_IDS, INV_APB, 0, 1)
34 FIELD(XRAM_ECC_CNTL, FI_MODE, 2, 1)
35 FIELD(XRAM_ECC_CNTL, DET_ONLY, 1, 1)
[all …]
/openbmc/qemu/hw/intc/
H A Dxlnx-pmu-iomod-intc.c52 FIELD(GPO0, MAGIC_WORD_1, 24, 8)
53 FIELD(GPO0, MAGIC_WORD_2, 16, 8)
54 FIELD(GPO0, FT_INJECT_FAILURE, 13, 3)
55 FIELD(GPO0, DISABLE_RST_FTSM, 12, 1)
56 FIELD(GPO0, RST_FTSM, 11, 1)
57 FIELD(GPO0, CLR_FTSTS, 10, 1)
58 FIELD(GPO0, RST_ON_SLEEP, 9, 1)
59 FIELD(GPO0, DISABLE_TRACE_COMP, 8, 1)
60 FIELD(GPO0, PIT3_PRESCALE, 7, 1)
61 FIELD(GPO0, PIT2_PRESCALE, 5, 2)
[all …]
H A Dgicv3_internal.h141 FIELD(GICR_PROPBASER, IDBITS, 0, 5)
142 FIELD(GICR_PROPBASER, INNERCACHE, 7, 3)
143 FIELD(GICR_PROPBASER, SHAREABILITY, 10, 2)
144 FIELD(GICR_PROPBASER, PHYADDR, 12, 40)
145 FIELD(GICR_PROPBASER, OUTERCACHE, 56, 3)
147 FIELD(GICR_PENDBASER, INNERCACHE, 7, 3)
148 FIELD(GICR_PENDBASER, SHAREABILITY, 10, 2)
149 FIELD(GICR_PENDBASER, PHYADDR, 16, 36)
150 FIELD(GICR_PENDBASER, OUTERCACHE, 56, 3)
151 FIELD(GICR_PENDBASER, PTZ, 62, 1)
[all …]
H A Dxlnx-zynqmp-ipi.c51 FIELD(IPI_TRIG, PL_3, 27, 1)
52 FIELD(IPI_TRIG, PL_2, 26, 1)
53 FIELD(IPI_TRIG, PL_1, 25, 1)
54 FIELD(IPI_TRIG, PL_0, 24, 1)
55 FIELD(IPI_TRIG, PMU_3, 19, 1)
56 FIELD(IPI_TRIG, PMU_2, 18, 1)
57 FIELD(IPI_TRIG, PMU_1, 17, 1)
58 FIELD(IPI_TRIG, PMU_0, 16, 1)
59 FIELD(IPI_TRIG, RPU_1, 9, 1)
60 FIELD(IPI_TRIG, RPU_0, 8, 1)
[all …]
/openbmc/qemu/hw/misc/
H A Dxlnx-versal-pmc-iou-slcr.c41 FIELD(MIO_PIN_0, L3_SEL, 7, 3)
42 FIELD(MIO_PIN_0, L2_SEL, 5, 2)
43 FIELD(MIO_PIN_0, L1_SEL, 3, 2)
44 FIELD(MIO_PIN_0, L0_SEL, 1, 2)
46 FIELD(MIO_PIN_1, L3_SEL, 7, 3)
47 FIELD(MIO_PIN_1, L2_SEL, 5, 2)
48 FIELD(MIO_PIN_1, L1_SEL, 3, 2)
49 FIELD(MIO_PIN_1, L0_SEL, 1, 2)
51 FIELD(MIO_PIN_2, L3_SEL, 7, 3)
52 FIELD(MIO_PIN_2, L2_SEL, 5, 2)
[all …]
/openbmc/qemu/target/loongarch/
H A Dcpu-csr.h19 FIELD(CSR_PRMD, PPLV, 0, 2)
20 FIELD(CSR_PRMD, PIE, 2, 1)
21 FIELD(CSR_PRMD, PWE, 3, 1)
24 FIELD(CSR_EUEN, FPE, 0, 1)
25 FIELD(CSR_EUEN, SXE, 1, 1)
26 FIELD(CSR_EUEN, ASXE, 2, 1)
27 FIELD(CSR_EUEN, BTE, 3, 1)
30 FIELD(CSR_MISC, VA32, 0, 4)
31 FIELD(CSR_MISC, DRDTL, 4, 4)
32 FIELD(CSR_MISC, RPCNTL, 8, 4)
[all …]
H A Dcpu.h48 FIELD(FCSR0, ENABLES, 0, 5)
49 FIELD(FCSR0, RM, 8, 2)
50 FIELD(FCSR0, FLAGS, 16, 5)
51 FIELD(FCSR0, CAUSE, 24, 5)
119 FIELD(CPUCFG0, PRID, 0, 32)
122 FIELD(CPUCFG1, ARCH, 0, 2)
123 FIELD(CPUCFG1, PGMMU, 2, 1)
124 FIELD(CPUCFG1, IOCSR, 3, 1)
125 FIELD(CPUCFG1, PALEN, 4, 8)
126 FIELD(CPUCFG1, VALEN, 12, 8)
[all …]
/openbmc/linux/arch/x86/kvm/vmx/
H A Dvmcs12.c7 #define FIELD(number, name) [ROL16(number, 6)] = VMCS12_OFFSET(name) macro
9 FIELD(number, name), \
13 FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
14 FIELD(POSTED_INTR_NV, posted_intr_nv),
15 FIELD(GUEST_ES_SELECTOR, guest_es_selector),
16 FIELD(GUEST_CS_SELECTOR, guest_cs_selector),
17 FIELD(GUEST_SS_SELECTOR, guest_ss_selector),
18 FIELD(GUEST_DS_SELECTOR, guest_ds_selector),
19 FIELD(GUEST_FS_SELECTOR, guest_fs_selector),
20 FIELD(GUEST_GS_SELECTOR, guest_gs_selector),
[all …]
/openbmc/qemu/hw/usb/
H A Dhcd-dwc3.c48 FIELD(GSBUSCFG0, DATRDREQINFO, 28, 4)
49 FIELD(GSBUSCFG0, DESRDREQINFO, 24, 4)
50 FIELD(GSBUSCFG0, DATWRREQINFO, 20, 4)
51 FIELD(GSBUSCFG0, DESWRREQINFO, 16, 4)
52 FIELD(GSBUSCFG0, RESERVED_15_12, 12, 4)
53 FIELD(GSBUSCFG0, DATBIGEND, 11, 1)
54 FIELD(GSBUSCFG0, DESBIGEND, 10, 1)
55 FIELD(GSBUSCFG0, RESERVED_9_8, 8, 2)
56 FIELD(GSBUSCFG0, INCR256BRSTENA, 7, 1)
57 FIELD(GSBUSCFG0, INCR128BRSTENA, 6, 1)
[all …]
/openbmc/qemu/target/arm/
H A Dcpregs.h348 FIELD(HFGRTR_EL2, AFSR0_EL1, 0, 1)
349 FIELD(HFGRTR_EL2, AFSR1_EL1, 1, 1)
350 FIELD(HFGRTR_EL2, AIDR_EL1, 2, 1)
351 FIELD(HFGRTR_EL2, AMAIR_EL1, 3, 1)
352 FIELD(HFGRTR_EL2, APDAKEY, 4, 1)
353 FIELD(HFGRTR_EL2, APDBKEY, 5, 1)
354 FIELD(HFGRTR_EL2, APGAKEY, 6, 1)
355 FIELD(HFGRTR_EL2, APIAKEY, 7, 1)
356 FIELD(HFGRTR_EL2, APIBKEY, 8, 1)
357 FIELD(HFGRTR_EL2, CCSIDR_EL1, 9, 1)
[all …]
H A Dcpu.h1480 FIELD(SVCR, SM, 0, 1)
1481 FIELD(SVCR, ZA, 1, 1)
1484 FIELD(SMCR, LEN, 0, 4)
1485 FIELD(SMCR, FA64, 31, 1)
1830 FIELD(V7M_CCR, NONBASETHRDENA, 0, 1)
1831 FIELD(V7M_CCR, USERSETMPEND, 1, 1)
1832 FIELD(V7M_CCR, UNALIGN_TRP, 3, 1)
1833 FIELD(V7M_CCR, DIV_0_TRP, 4, 1)
1834 FIELD(V7M_CCR, BFHFNMIGN, 8, 1)
1835 FIELD(V7M_CCR, STKALIGN, 9, 1)
[all …]
/openbmc/qemu/hw/net/can/
H A Dxlnx-versal-canfd.c49 FIELD(SOFTWARE_RESET_REGISTER, CEN, 1, 1)
50 FIELD(SOFTWARE_RESET_REGISTER, SRST, 0, 1)
52 FIELD(MODE_SELECT_REGISTER, ITO, 8, 8)
53 FIELD(MODE_SELECT_REGISTER, ABR, 7, 1)
54 FIELD(MODE_SELECT_REGISTER, SBR, 6, 1)
55 FIELD(MODE_SELECT_REGISTER, DPEE, 5, 1)
56 FIELD(MODE_SELECT_REGISTER, DAR, 4, 1)
57 FIELD(MODE_SELECT_REGISTER, BRSD, 3, 1)
58 FIELD(MODE_SELECT_REGISTER, SNOOP, 2, 1)
59 FIELD(MODE_SELECT_REGISTER, LBACK, 1, 1)
[all …]
H A Dxlnx-zynqmp-can.c57 FIELD(SOFTWARE_RESET_REGISTER, CEN, 1, 1)
58 FIELD(SOFTWARE_RESET_REGISTER, SRST, 0, 1)
60 FIELD(MODE_SELECT_REGISTER, SNOOP, 2, 1)
61 FIELD(MODE_SELECT_REGISTER, LBACK, 1, 1)
62 FIELD(MODE_SELECT_REGISTER, SLEEP, 0, 1)
64 FIELD(ARBITRATION_PHASE_BAUD_RATE_PRESCALER_REGISTER, BRP, 0, 8)
66 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, SJW, 7, 2)
67 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, TS2, 4, 3)
68 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, TS1, 0, 4)
70 FIELD(ERROR_COUNTER_REGISTER, REC, 8, 8)
[all …]
/openbmc/qemu/hw/sd/
H A Dsdhci-internal.h86 FIELD(SDHC_PRNSTS, DAT_LVL, 20, 4);
87 FIELD(SDHC_PRNSTS, CMD_LVL, 24, 1);
110 FIELD(SDHC_PWRCON, BUS_VOLTAGE, 1, 3);
133 FIELD(SDHC_TIMEOUTCON, COUNTER, 0, 4);
190 FIELD(SDHC_ACMD12ERRSTS, TIMEOUT_ERR, 1, 1);
191 FIELD(SDHC_ACMD12ERRSTS, CRC_ERR, 2, 1);
192 FIELD(SDHC_ACMD12ERRSTS, INDEX_ERR, 4, 1);
196 FIELD(SDHC_HOSTCTL2, UHS_MODE_SEL, 0, 3);
197 FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I only */
198 FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */
[all …]
/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c36 FIELD(CR1, M1, 28, 1) /* Word length (part 2, see M0) */
37 FIELD(CR1, EOBIE, 27, 1) /* End of Block interrupt enable */
38 FIELD(CR1, RTOIE, 26, 1) /* Receiver timeout interrupt enable */
39 FIELD(CR1, DEAT, 21, 5) /* Driver Enable assertion time */
40 FIELD(CR1, DEDT, 16, 5) /* Driver Enable de-assertion time */
41 FIELD(CR1, OVER8, 15, 1) /* Oversampling mode */
42 FIELD(CR1, CMIE, 14, 1) /* Character match interrupt enable */
43 FIELD(CR1, MME, 13, 1) /* Mute mode enable */
44 FIELD(CR1, M0, 12, 1) /* Word length (part 1, see M1) */
45 FIELD(CR1, WAKE, 11, 1) /* Receiver wakeup method */
[all …]
/openbmc/qemu/include/hw/i2c/
H A Daspeed_i2c.h72 FIELD(I2C_CTRL_GLOBAL, REG_MODE, 2, 1)
73 FIELD(I2C_CTRL_GLOBAL, SRAM_EN, 0, 1)
78 FIELD(I2CD_FUN_CTRL, POOL_PAGE_SEL, 20, 3) /* AST2400 */
102 FIELD(I2CD_INTR_STS, SMBUS_ARP_ADDR, 11, 1) /* Removed */
103 FIELD(I2CD_INTR_STS, SMBUS_DEV_ALERT_ADDR, 10, 1) /* Removed */
104 FIELD(I2CD_INTR_STS, SMBUS_DEF_ADDR, 9, 1) /* Removed */
105 FIELD(I2CD_INTR_STS, GCALL_ADDR, 8, 1) /* Removed */
106 FIELD(I2CD_INTR_STS, SLAVE_ADDR_RX_MATCH, 7, 1) /* use RX_DONE */
147 FIELD(I2CD_POOL_CTRL, OFFSET, 2, 6) /* AST2400 */
157 FIELD(I2CC_FUN_CTRL, RB_EARLY_DONE_EN, 22, 1)
[all …]
/openbmc/qemu/hw/ssi/
H A Dxlnx-versal-ospi.c39 FIELD(CONFIG_REG, IDLE_FLD, 31, 1)
40 FIELD(CONFIG_REG, DUAL_BYTE_OPCODE_EN_FLD, 30, 1)
41 FIELD(CONFIG_REG, CRC_ENABLE_FLD, 29, 1)
42 FIELD(CONFIG_REG, CONFIG_RESV2_FLD, 26, 3)
43 FIELD(CONFIG_REG, PIPELINE_PHY_FLD, 25, 1)
44 FIELD(CONFIG_REG, ENABLE_DTR_PROTOCOL_FLD, 24, 1)
45 FIELD(CONFIG_REG, ENABLE_AHB_DECODER_FLD, 23, 1)
46 FIELD(CONFIG_REG, MSTR_BAUD_DIV_FLD, 19, 4)
47 FIELD(CONFIG_REG, ENTER_XIP_MODE_IMM_FLD, 18, 1)
48 FIELD(CONFIG_REG, ENTER_XIP_MODE_FLD, 17, 1)
[all …]
/openbmc/qemu/include/hw/rtc/
H A Dxlnx-zynqmp-rtc.h41 FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
42 FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
43 FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
45 FIELD(CALIB_READ, FRACTION_EN, 20, 1)
46 FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
47 FIELD(CALIB_READ, MAX_TICK, 0, 16)
50 FIELD(CURRENT_TICK, VALUE, 0, 16)
53 FIELD(RTC_INT_STATUS, ALARM, 1, 1)
54 FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
56 FIELD(RTC_INT_MASK, ALARM, 1, 1)
[all …]
/openbmc/qemu/hw/i3c/
H A Daspeed_i3c.c34 FIELD(I3C1_REG1, I2C_MODE, 0, 1)
35 FIELD(I3C1_REG1, SLV_TEST_MODE, 1, 1)
36 FIELD(I3C1_REG1, ACT_MODE, 2, 2)
37 FIELD(I3C1_REG1, PENDING_INT, 4, 4)
38 FIELD(I3C1_REG1, SA, 8, 7)
39 FIELD(I3C1_REG1, SA_EN, 15, 1)
40 FIELD(I3C1_REG1, INST_ID, 16, 4)
43 FIELD(I3C2_REG1, I2C_MODE, 0, 1)
44 FIELD(I3C2_REG1, SLV_TEST_MODE, 1, 1)
45 FIELD(I3C2_REG1, ACT_MODE, 2, 2)
[all …]

123456