/openbmc/u-boot/board/ccv/xpress/ |
H A D | spl.c | 61 .ddr_type = DDR_TYPE_DDR3,
|
/openbmc/u-boot/board/barco/platinum/ |
H A D | spl_picon.c | 137 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
H A D | spl_titanium.c | 140 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/engicam/common/ |
H A D | spl.c | 233 .ddr_type = DDR_TYPE_DDR3, 345 .ddr_type = DDR_TYPE_DDR3,
|
/openbmc/u-boot/board/phytec/pcl063/ |
H A D | spl.c | 66 .ddr_type = DDR_TYPE_DDR3,
|
/openbmc/u-boot/arch/arm/mach-imx/mx6/ |
H A D | litesom.c | 129 .ddr_type = DDR_TYPE_DDR3,
|
H A D | opos6ul.c | 194 .ddr_type = DDR_TYPE_DDR3,
|
H A D | ddr.c | 1553 if (sysinfo->ddr_type == DDR_TYPE_DDR3) { in mx6_dram_cfg()
|
/openbmc/linux/drivers/memory/ |
H A D | jedec_ddr.h | 28 #define DDR_TYPE_DDR3 2 macro
|
/openbmc/u-boot/board/liebherr/display5/ |
H A D | spl.c | 182 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
H A D | kp_imx6q_tpc_spl.c | 245 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/phytec/pcm058/ |
H A D | pcm058.c | 507 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/freescale/mx6memcal/ |
H A D | spl.c | 232 .ddr_type = DDR_TYPE_DDR3,
|
/openbmc/u-boot/board/gateworks/gw_ventana/ |
H A D | gw_ventana_spl.c | 509 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/freescale/mx6sxsabresd/ |
H A D | mx6sxsabresd.c | 523 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/board/el/el6x/ |
H A D | el6x.c | 595 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | mx6-ddr.h | 33 DDR_TYPE_DDR3, enumerator
|
/openbmc/u-boot/board/phytec/pfla02/ |
H A D | pfla02.c | 649 .ddr_type = DDR_TYPE_DDR3, in board_init_f()
|
/openbmc/u-boot/board/freescale/mx6ul_14x14_evk/ |
H A D | mx6ul_14x14_evk.c | 678 .ddr_type = DDR_TYPE_DDR3,
|
/openbmc/u-boot/board/solidrun/mx6cuboxi/ |
H A D | mx6cuboxi.c | 808 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
|
/openbmc/u-boot/drivers/ram/ |
H A D | k3-am654-ddrss.c | 88 case DDR_TYPE_DDR3: in am654_ddrss_dram_wait_for_init_complt()
|
H A D | k3-am654-ddrss.h | 173 #define DDR_TYPE_DDR3 0x1 macro
|