| /openbmc/u-boot/board/mpc8308_p1m/ |
| H A D | sdram.c | 42 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
|
| /openbmc/u-boot/board/gdsys/mpc8308/ |
| H A D | sdram.c | 47 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
|
| /openbmc/u-boot/board/freescale/mpc8308rdb/ |
| H A D | sdram.c | 46 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
|
| /openbmc/u-boot/board/freescale/mpc8315erdb/ |
| H A D | sdram.c | 63 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
|
| /openbmc/u-boot/include/configs/km/ |
| H A D | km83xx-common.h | 42 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ macro
|
| /openbmc/u-boot/board/freescale/mpc837xerdb/ |
| H A D | mpc837xerdb.c | 104 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
|
| /openbmc/u-boot/include/configs/ |
| H A D | mpc8308_p1m.h | 122 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | MPC8308RDB.h | 119 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | MPC8569MDS.h | 101 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x01000000 macro
|
| H A D | vme8349.h | 86 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro
|
| H A D | MPC8315ERDB.h | 95 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | sbc8349.h | 78 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ macro
|
| H A D | hrcon.h | 109 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | MPC837XERDB.h | 132 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 macro
|
| H A D | MPC8349ITX.h | 164 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro
|
| H A D | MPC837XEMDS.h | 110 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | strider.h | 109 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
|
| H A D | MPC8349EMDS.h | 83 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro
|
| /openbmc/u-boot/board/freescale/mpc8349itx/ |
| H A D | mpc8349itx.c | 67 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spd_sdram.c | 763 #ifdef CONFIG_SYS_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */ in spd_sdram()
764 ddr->sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in spd_sdram()
|
| /openbmc/u-boot/board/freescale/mpc837xemds/ |
| H A D | mpc837xemds.c | 264 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
|
| /openbmc/u-boot/board/freescale/mpc8569mds/ |
| H A D | mpc8569mds.c | 250 out_be32(&ddr->sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
|
| /openbmc/u-boot/scripts/ |
| H A D | config_whitelist.txt | 2381 CONFIG_SYS_DDR_SDRAM_CLK_CNTL
|