| /openbmc/u-boot/include/ |
| H A D | mpc85xx.h | 40 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW
56 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW
57 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT macro
61 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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| /openbmc/u-boot/include/configs/ |
| H A D | qemu-ppce500.h | 38 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() macro
41 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8641HPCN.h | 89 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
92 PAIRED_PHYS_TO_PHYS(CONFIG_SYS_CCSRBAR_PHYS_LOW, \
472 #define CONFIG_SYS_DBAT3L (BAT_PHYS_ADDR(CONFIG_SYS_CCSRBAR_PHYS_LOW, \
478 #define CONFIG_SYS_IBAT3L (BAT_PHYS_ADDR(CONFIG_SYS_CCSRBAR_PHYS_LOW, \
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| H A D | sbc8641d.h | 83 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
85 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
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| H A D | MPC8610HPCD.h | 70 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
72 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
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| H A D | MPC8541CDS.h | 39 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8555CDS.h | 39 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | controlcenterd.h | 109 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8540ADS.h | 65 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | socrates.h | 60 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8568MDS.h | 44 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | BSC9131RDB.h | 117 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT macro
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| H A D | MPC8560ADS.h | 64 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8544DS.h | 45 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | xpedite520x.h | 50 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | sbc8548.h | 83 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | MPC8548CDS.h | 56 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | xpedite537x.h | 66 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | xpedite550x.h | 65 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | p1_twr.h | 64 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | C29XPCIE.h | 134 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| H A D | UCP1020.h | 121 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/ |
| H A D | immap_ls102xa.h | 59 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW
75 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW
76 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR macro
80 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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| /openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
| H A D | immap_lsch2.h | 158 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW
170 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW
171 #define CONFIG_SYS_CCSRBAR_PHYS_LOW 0x01000000 macro
175 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | start.S | 518 #if !defined(CONFIG_SYS_CCSRBAR_PHYS_HIGH) || !defined(CONFIG_SYS_CCSRBAR_PHYS_LOW)
534 CONFIG_SYS_CCSRBAR_PHYS_LOW, MAS3_SW|MAS3_SR, \
589 lis r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@h
590 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
628 lis r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@h
629 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
668 (CONFIG_SYS_CCSRBAR_PHYS_LOW >> 12))
709 CONFIG_SYS_CCSRBAR_PHYS_LOW + 0xC20000, MAS3_SW|MAS3_SR, \
830 lis r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@h
831 ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@l
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