| /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | fsl_lbc.c | 65 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM) in init_early_memctl_regs()
67 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM); in init_early_memctl_regs()
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc8xx/ |
| H A D | cpu_init.c | 141 #if (defined(CONFIG_SYS_OR1_PRELIM) && defined(CONFIG_SYS_BR1_PRELIM)) in cpu_init_f()
143 out_be32(&memctl->memc_br1, CONFIG_SYS_BR1_PRELIM); in cpu_init_f()
|
| /openbmc/u-boot/board/xes/xpedite520x/ |
| H A D | xpedite520x.c | 36 set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); in flash_cs_fixup()
|
| /openbmc/u-boot/board/xes/xpedite537x/ |
| H A D | xpedite537x.c | 34 set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); in flash_cs_fixup()
|
| /openbmc/u-boot/board/xes/xpedite550x/ |
| H A D | xpedite550x.c | 34 set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); in flash_cs_fixup()
|
| /openbmc/u-boot/board/xes/xpedite517x/ |
| H A D | xpedite517x.c | 39 set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); in flash_cs_fixup()
|
| /openbmc/u-boot/include/configs/ |
| H A D | P1022DS.h | 201 #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
259 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
|
| H A D | P2041RDB.h | 228 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
233 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
|
| H A D | MPC8313ERDB.h | 271 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM macro
276 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM macro
|
| H A D | M5272C3.h | 175 #define CONFIG_SYS_BR1_PRELIM 0 macro
|
| H A D | cobra5272.h | 289 #define CONFIG_SYS_BR1_PRELIM 0 macro
|
| H A D | MPC8541CDS.h | 102 #define CONFIG_SYS_BR1_PRELIM 0xff001001 macro
|
| H A D | MPC8555CDS.h | 100 #define CONFIG_SYS_BR1_PRELIM 0xff001001 macro
|
| H A D | controlcenterd.h | 151 #define CONFIG_SYS_BR1_PRELIM CONFIG_UART_BR_PRELIM macro
|
| H A D | socrates.h | 108 #define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */ macro
|
| H A D | MPC8568MDS.h | 111 #define CONFIG_SYS_BR1_PRELIM 0xf8000801 macro
|
| H A D | p1_p2_rdb_pc.h | 462 #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
468 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ macro
|
| H A D | P1023RDB.h | 135 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM macro
|
| H A D | MPC8544DS.h | 104 #define CONFIG_SYS_BR1_PRELIM 0xfe801001 macro
|
| H A D | xpedite520x.h | 117 #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ macro
|
| H A D | MPC8548CDS.h | 155 #define CONFIG_SYS_BR1_PRELIM \ macro
|
| /openbmc/u-boot/board/cssi/MCR3000/ |
| H A D | MCR3000.c | 105 out_be32(&memctl->memc_br1, CONFIG_SYS_BR1_PRELIM); in dram_init()
|
| /openbmc/u-boot/doc/ |
| H A D | README.lynxkdi | 44 #define CONFIG_SYS_BR1_PRELIM 0xFA101801
|
| /openbmc/u-boot/configs/ |
| H A D | MCR3000_defconfig | 19 CONFIG_SYS_BR1_PRELIM=0x00000081
|
| /openbmc/u-boot/include/configs/km/ |
| H A D | km83xx-common.h | 113 #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ macro
|