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/openbmc/linux/drivers/memory/
H A Djedec_ddr.h69 /* tRFC values */
228 u32 tRFC; member
257 u32 tRFC; member
H A Dof_memory.c175 ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC); in of_lpddr3_get_min_tck()
221 ret |= of_property_read_u32(np, "tRFC", &tim->tRFC); in of_lpddr3_do_get_timings()
/openbmc/u-boot/include/
H A Dspd.h55 unsigned char trctrfc_ext; /* 40 Extensions to trc and trfc */
57 unsigned char trfc; /* 42 Min Auto to Active period tRFC */ member
H A Dddr_spd.h53 unsigned char trfc; /* 42 Min Auto to Active period tRFC */ member
119 unsigned char trctrfc_ext; /* 40 Extensions to trc and trfc */
121 unsigned char trfc; /* 42 Min Auto to Active period tRFC */ member
/openbmc/u-boot/board/work-microwave/work_92105/
H A Dwork_92105_spl.c28 .trfc = 10256410,
48 .trfc = 10256410,
/openbmc/u-boot/board/technologic/ts4600/
H A Diomux.c131 #define TRFC 0x27 macro
134 #define HW_DRAM_CTL43_CONFIG (TRP << 24 | TRFC << 16 | TREF)
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr3.yaml99 tRFC-min-tck:
207 tRFC-min-tck = <17>;
232 tRFC = <65000>;
H A Djedec,lpddr3-timings.yaml74 tRFC:
146 tRFC = <65000>;
/openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dddr2_v3s.c22 u16 trfc = ns_to_t(328); in mctl_set_timing_params() local
83 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
H A Dlpddr3_stock.c22 u16 trfc = ns_to_t(210); in mctl_set_timing_params() local
82 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
H A Dddr3_1333.c22 u16 trfc = ns_to_t(350); in mctl_set_timing_params() local
86 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
/openbmc/u-boot/board/freescale/mx6memcal/
H A DKconfig220 0 == 1 refresh (tRFC)
221 7 == 8 refreshes (tRFC*8)
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c1000 u16 tras, twr, tmrd, trtp, twtr, trfc, txsr; in mx6_lpddr2_cfg() local
1019 /* LPDDR2-S2 and LPDDR2-S4 have the same tRFC value. */ in mx6_lpddr2_cfg()
1024 trfc = DIV_ROUND_UP(130000, clkper) - 1; in mx6_lpddr2_cfg()
1028 trfc = DIV_ROUND_UP(210000, clkper) - 1; in mx6_lpddr2_cfg()
1083 debug("trfc=%d\n", trfc); in mx6_lpddr2_cfg()
1140 mmdc0->mdcfg0 = (trfc << 24) | (txsr << 16) | (txp << 13) | in mx6_lpddr2_cfg()
1231 u16 trcd, trc, tras, twr, tmrd, trtp, trp, twtr, trfc, txs, txpr; in mx6_ddr3_cfg() local
1276 trfc = DIV_ROUND_UP(110000, clkper) - 1; in mx6_ddr3_cfg()
1280 trfc = DIV_ROUND_UP(160000, clkper) - 1; in mx6_ddr3_cfg()
1284 trfc = DIV_ROUND_UP(260000, clkper) - 1; in mx6_ddr3_cfg()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rk3036.h47 u32 trfc; member
244 u32 trfc; member
H A Dsdram.h50 u32 trfc; member
/openbmc/u-boot/drivers/ddr/fsl/
H A Dddr2_dimm_params.c107 compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc) in compute_trfc_ps_from_spd() argument
109 return (((trctrfc_ext & 0x1) * 256) + trfc) * 1000 in compute_trfc_ps_from_spd()
311 pdimm->trfc_ps = compute_trfc_ps_from_spd(spd->trctrfc_ext, spd->trfc); in ddr_compute_dimm_parameters()
H A Dddr1_dimm_params.c108 compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc) in compute_trfc_ps_from_spd() argument
110 return ((trctrfc_ext & 0x1) * 256 + trfc) * 1000 in compute_trfc_ps_from_spd()
312 pdimm->trfc_ps = compute_trfc_ps_from_spd(0, spd->trfc); in ddr_compute_dimm_parameters()
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dspd_sdram.c137 unsigned int trfc, trfc_clk, trfc_low; in spd_sdram() local
494 * Calculate Trfc, in picos. in spd_sdram()
499 trfc = spd.trfc * 1000; /* up to ps */ in spd_sdram()
512 trfc = (((spd.trctrfc_ext & 0x1) * 256) + spd.trfc) * 1000 in spd_sdram()
515 trfc_clk = picos_to_clk(trfc); in spd_sdram()
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dddrmc-vf610.h40 u8 trfc; member
/openbmc/linux/drivers/gpu/drm/ast/
H A Dast_dram_tables.h183 0x9971452F, /* tRFC */
203 0x99714545, /* tRFC */
/openbmc/u-boot/board/timll/devkit3250/
H A Ddevkit3250_spl.c35 .trfc = 15384616,
/openbmc/u-boot/board/armadeus/apf27/
H A Dapf27.h93 #define ACFG_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC
139 #define ACFG_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC
185 #define ACFG_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a83t.c105 u16 trfc = ns_to_t(350); in auto_set_timing_para() local
155 trfc = ns_to_t(210); in auto_set_timing_para()
198 reg_val = (trefi << 16) | (trfc << 0); in auto_set_timing_para()
H A Ddram_sun4i.c423 /* tRFC in nanoseconds for different densities (from the DDR3 spec) */
432 u32 tRFC, tREFI; in dramc_set_autorefresh_cycle() local
434 tRFC = (tRFC_DDR3_table[density] * clk + 999) / 1000; in dramc_set_autorefresh_cycle()
437 writel(DRAM_DRR_TREFI(tREFI) | DRAM_DRR_TRFC(tRFC), &dram->drr); in dramc_set_autorefresh_cycle()
H A Ddram_sun9i.c115 u32 tRFC; /* in ns */ member
376 const u32 tRFC = NS2CYCLES_ROUNDUP(para->tRFC); in mctl_channel_init() local
569 writel((MCTL_DIV32(tREFI) << 16) | (MCTL_DIV2(tRFC) << 0), in mctl_channel_init()
645 (tRFC << 11) | (tWLMRD << 20) | (tWLO << 26), in mctl_channel_init()
885 .tRFC = 260, /* 260ns for 4GBit devices */ in sunxi_dram_init()

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