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/openbmc/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
32 vdd-supply:
35 svdd-supply:
38 "#io-channel-cells":
41 semtech,ph0-pin:
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-quackingstick-r0-lte.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x6 (AUO)
11 #include "sc7180-trogdor-quackingstick-r0.dts"
12 #include "sc7180-trogdor-lte-sku.dtsi"
16 compatible = "google,quackingstick-sku1536", "qcom,sc7180";
21 semtech,ph0-pin = <3 1 3>;
22 semtech,ph1-pin = <2 1 2>;
23 semtech,ph2-pin = <3 3 1>;
24 semtech,ph3-pin = <1 3 3>;
25 semtech,ph01-resolution = <1024>;
[all …]
H A Dsc7180-trogdor-pazquel.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /* This file must be included after sc7180-trogdor.dtsi */
9 #include <arm/cros-ec-keyboard.dtsi>
13 semtech,ph0-pin = <1 3 3>;
14 semtech,ph1-pin = <3 1 3>;
15 semtech,ph2-pin = <1 3 3>;
16 semtech,ph3-pin = <0 0 0>;
17 semtech,ph01-resolution = <1024>;
18 semtech,ph23-resolution = <1024>;
19 semtech,startup-sensor = <1>;
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dgpio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2012
16 * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
17 * PD0 - PD27 | PE0 - PE31 | PF0 - PF5
18 * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
43 * PL0 - PL8 | PM0 - PM7
46 * PL0 - PL11
49 * PL0 - PL9 | PM0 - PM15 | PN0 - PN1
77 &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \
78 &((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) - SUNXI_GPIO_L])
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun4i-a10-inet1.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/pwm/pwm.h>
52 model = "iNet-1";
53 compatible = "inet-tek,inet1", "allwinner,sun4i-a10";
[all …]
H A Dsun4i-a10-inet9f-rev03.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
51 model = "iNet-9F Rev 03";
52 compatible = "inet-tek,inet9f-rev03", "allwinner,sun4i-a10";
59 stdout-path = "serial0:115200n8";
[all …]
H A Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
55 interrupt-parent = <&gic>;
56 #address-cells = <1>;
[all …]
H A Dtegra124-apalis.dts4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
44 #include <dt-bindings/input/input.h>
49 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
73 stdout-path = "serial0:115200n8";
80 pcie-controller@01003000 {
82 avddio-pex-supply = <&vdd_1v05>;
83 avdd-pex-pll-supply = <&vdd_1v05>;
84 avdd-pll-erefe-supply = <&avdd_1v05>;
85 dvddio-pex-supply = <&vdd_1v05>;
[all …]
H A Dsun50i-a64.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun50i-a64-ccu.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r-ccu.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/reset/sun50i-a64-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/reset/sun8i-r-ccu.h>
54 interrupt-parent = <&gic>;
55 #address-cells = <1>;
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
10 #define PIN(pin, f0, f1, f2, f3) \ macro
23 /* pin, f0, f1, f2, f3 */
25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
21 - const: nvidia,tegra124-pinmux
22 - items:
[all …]
/openbmc/linux/drivers/iio/proximity/
H A Dsx9324.c1 // SPDX-License-Identifier: GPL-2.0
169 /* 4 channels, as defined in STAT0: PH0, PH1, PH2 and PH3. */
186 ret = regmap_read(data->regmap, SX9324_REG_AFE_PH0 + chan->channel, &val); in sx9324_phase_configuration_show()
195 buf[len - 1] = '\n'; in sx9324_phase_configuration_show()
315 regmap_reg_range(SX9324_REG_IRQ_CFG2 + 1, SX9324_REG_GNRL_CTRL0 - 1),
316 regmap_reg_range(SX9324_REG_GNRL_CTRL1 + 1, SX9324_REG_AFE_CTRL0 - 1),
317 regmap_reg_range(SX9324_REG_AFE_CTRL9 + 1, SX9324_REG_PROX_CTRL0 - 1),
318 regmap_reg_range(SX9324_REG_PROX_CTRL7 + 1, SX9324_REG_ADV_CTRL0 - 1),
319 regmap_reg_range(SX9324_REG_ADV_CTRL20 + 1, SX9324_REG_PHASE_SEL - 1),
320 regmap_reg_range(SX9324_REG_SAR_LSB + 1, SX9324_REG_RESET - 1),
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
[all …]
H A Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun6i-rtc.h>
48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
H A Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
[all …]
H A Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
/openbmc/u-boot/board/cei/cei-tk1-som/
H A Dpinmux-config-cei-tk1-som.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py cei-tk1-som".
24 /* port, pin, init_val */
111 PINCFG(PH0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
/openbmc/u-boot/board/nvidia/nyan-big/
H A Dpinmux-config-nyan-big.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py nyan-big".
24 /* port, pin, init_val */
115 PINCFG(PH0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
/openbmc/u-boot/board/nvidia/jetson-tk1/
H A Dpinmux-config-jetson-tk1.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py jetson-tk1".
24 /* port, pin, init_val */
119 PINCFG(PH0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
/openbmc/u-boot/board/nvidia/venice2/
H A Dpinmux-config-venice2.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py venice2".
24 /* port, pin, init_val */
126 PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
/openbmc/u-boot/board/toradex/apalis-tk1/
H A Dpinmux-config-apalis-tk1.h1 /* SPDX-License-Identifier: GPL-2.0+ */
16 /* port, pin, init_val */
100 PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),

12