1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2f38f5f4bSMarcel Ziswiler /* 3f38f5f4bSMarcel Ziswiler * Copyright (c) 2016, Toradex, Inc. 4f38f5f4bSMarcel Ziswiler */ 5f38f5f4bSMarcel Ziswiler 6f38f5f4bSMarcel Ziswiler #ifndef _PINMUX_CONFIG_APALIS_TK1_H_ 7f38f5f4bSMarcel Ziswiler #define _PINMUX_CONFIG_APALIS_TK1_H_ 8f38f5f4bSMarcel Ziswiler 9f38f5f4bSMarcel Ziswiler #define GPIO_INIT(_port, _gpio, _init) \ 10f38f5f4bSMarcel Ziswiler { \ 11f38f5f4bSMarcel Ziswiler .gpio = TEGRA_GPIO(_port, _gpio), \ 12f38f5f4bSMarcel Ziswiler .init = TEGRA_GPIO_INIT_##_init, \ 13f38f5f4bSMarcel Ziswiler } 14f38f5f4bSMarcel Ziswiler 15f38f5f4bSMarcel Ziswiler static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = { 16f38f5f4bSMarcel Ziswiler /* port, pin, init_val */ 17f38f5f4bSMarcel Ziswiler GPIO_INIT(A, 1, IN), 18f38f5f4bSMarcel Ziswiler GPIO_INIT(B, 1, IN), 19f38f5f4bSMarcel Ziswiler GPIO_INIT(C, 0, OUT0), 20f38f5f4bSMarcel Ziswiler GPIO_INIT(I, 5, IN), 21f38f5f4bSMarcel Ziswiler GPIO_INIT(I, 6, IN), 22f38f5f4bSMarcel Ziswiler GPIO_INIT(J, 0, IN), 23f38f5f4bSMarcel Ziswiler GPIO_INIT(J, 2, IN), 24f38f5f4bSMarcel Ziswiler GPIO_INIT(K, 2, IN), 25f38f5f4bSMarcel Ziswiler GPIO_INIT(K, 7, IN), 26f38f5f4bSMarcel Ziswiler GPIO_INIT(N, 2, OUT1), 27f38f5f4bSMarcel Ziswiler GPIO_INIT(N, 4, OUT1), 28f38f5f4bSMarcel Ziswiler GPIO_INIT(N, 5, OUT1), 29f38f5f4bSMarcel Ziswiler GPIO_INIT(N, 7, IN), 30f38f5f4bSMarcel Ziswiler GPIO_INIT(O, 5, IN), 31f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */ 32f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 1, OUT0), /* Shift_CTRL_OE[1] */ 33f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 2, OUT0), /* Shift_CTRL_OE[2] */ 34f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 4, OUT0), /* Shift_CTRL_OE[4] */ 35f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 5, OUT1), /* Shift_CTRL_Dir_Out[0] */ 36f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 6, OUT1), /* Shift_CTRL_Dir_Out[1] */ 37f38f5f4bSMarcel Ziswiler GPIO_INIT(Q, 7, OUT1), /* Shift_CTRL_Dir_Out[2] */ 38f38f5f4bSMarcel Ziswiler GPIO_INIT(R, 0, OUT0), /* Shift_CTRL_Dir_In[0] */ 39f38f5f4bSMarcel Ziswiler GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */ 40f38f5f4bSMarcel Ziswiler GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */ 41f38f5f4bSMarcel Ziswiler GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */ 42f38f5f4bSMarcel Ziswiler GPIO_INIT(U, 4, OUT1), 43f38f5f4bSMarcel Ziswiler GPIO_INIT(W, 3, IN), 44f38f5f4bSMarcel Ziswiler GPIO_INIT(W, 5, IN), 45f38f5f4bSMarcel Ziswiler GPIO_INIT(BB, 0, IN), 46f38f5f4bSMarcel Ziswiler GPIO_INIT(BB, 3, OUT0), 47f38f5f4bSMarcel Ziswiler GPIO_INIT(BB, 4, IN), 48f38f5f4bSMarcel Ziswiler GPIO_INIT(BB, 5, OUT1), 49f38f5f4bSMarcel Ziswiler GPIO_INIT(BB, 6, OUT0), 50f38f5f4bSMarcel Ziswiler GPIO_INIT(CC, 5, IN), 51f38f5f4bSMarcel Ziswiler GPIO_INIT(DD, 3, IN), 52f38f5f4bSMarcel Ziswiler GPIO_INIT(EE, 3, IN), 53f38f5f4bSMarcel Ziswiler GPIO_INIT(EE, 5, IN), 54f38f5f4bSMarcel Ziswiler GPIO_INIT(FF, 1, IN), 55f38f5f4bSMarcel Ziswiler }; 56f38f5f4bSMarcel Ziswiler 57f38f5f4bSMarcel Ziswiler #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ 58f38f5f4bSMarcel Ziswiler { \ 59f38f5f4bSMarcel Ziswiler .pingrp = PMUX_PINGRP_##_pingrp, \ 60f38f5f4bSMarcel Ziswiler .func = PMUX_FUNC_##_mux, \ 61f38f5f4bSMarcel Ziswiler .pull = PMUX_PULL_##_pull, \ 62f38f5f4bSMarcel Ziswiler .tristate = PMUX_TRI_##_tri, \ 63f38f5f4bSMarcel Ziswiler .io = PMUX_PIN_##_io, \ 64f38f5f4bSMarcel Ziswiler .od = PMUX_PIN_OD_##_od, \ 65f38f5f4bSMarcel Ziswiler .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \ 66f38f5f4bSMarcel Ziswiler .lock = PMUX_PIN_LOCK_DEFAULT, \ 67f38f5f4bSMarcel Ziswiler .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ 68f38f5f4bSMarcel Ziswiler } 69f38f5f4bSMarcel Ziswiler 70f38f5f4bSMarcel Ziswiler static const struct pmux_pingrp_config apalis_tk1_pingrps[] = { 71f38f5f4bSMarcel Ziswiler /* pingrp, mux, pull, tri, e_input, od, rcv_sel */ 72f38f5f4bSMarcel Ziswiler PINCFG(CLK_32K_OUT_PA0, SOC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 73f38f5f4bSMarcel Ziswiler PINCFG(UART3_CTS_N_PA1, GMI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 74f38f5f4bSMarcel Ziswiler PINCFG(DAP2_FS_PA2, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 75f38f5f4bSMarcel Ziswiler PINCFG(DAP2_SCLK_PA3, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 76f38f5f4bSMarcel Ziswiler PINCFG(DAP2_DIN_PA4, HDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 77f38f5f4bSMarcel Ziswiler PINCFG(DAP2_DOUT_PA5, HDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 78f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 79f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 80f38f5f4bSMarcel Ziswiler PINCFG(PB0, UARTD, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 81f38f5f4bSMarcel Ziswiler PINCFG(PB1, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 82f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 83f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 84f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 85f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 86f38f5f4bSMarcel Ziswiler PINCFG(UART3_RTS_N_PC0, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 87f38f5f4bSMarcel Ziswiler PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 88f38f5f4bSMarcel Ziswiler PINCFG(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 89f38f5f4bSMarcel Ziswiler PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 90f38f5f4bSMarcel Ziswiler PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 91f38f5f4bSMarcel Ziswiler PINCFG(PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 92f38f5f4bSMarcel Ziswiler PINCFG(PG0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 93f38f5f4bSMarcel Ziswiler PINCFG(PG1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 94f38f5f4bSMarcel Ziswiler PINCFG(PG2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 95f38f5f4bSMarcel Ziswiler PINCFG(PG3, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 96f38f5f4bSMarcel Ziswiler PINCFG(PG4, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 97f38f5f4bSMarcel Ziswiler PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 98f38f5f4bSMarcel Ziswiler PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 99f38f5f4bSMarcel Ziswiler PINCFG(PG7, SPI4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 100f38f5f4bSMarcel Ziswiler PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 101f38f5f4bSMarcel Ziswiler PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 102f38f5f4bSMarcel Ziswiler PINCFG(PH2, PWM2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 103f38f5f4bSMarcel Ziswiler PINCFG(PH3, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 104f38f5f4bSMarcel Ziswiler PINCFG(PH4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 105f38f5f4bSMarcel Ziswiler PINCFG(PH5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 106f38f5f4bSMarcel Ziswiler PINCFG(PH6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 107f38f5f4bSMarcel Ziswiler PINCFG(PH7, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 108f38f5f4bSMarcel Ziswiler PINCFG(PI0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 109f38f5f4bSMarcel Ziswiler PINCFG(PI1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 110f38f5f4bSMarcel Ziswiler PINCFG(PI2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 111f38f5f4bSMarcel Ziswiler PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 112f38f5f4bSMarcel Ziswiler PINCFG(PI4, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 113f38f5f4bSMarcel Ziswiler PINCFG(PI5, RSVD2, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 114f38f5f4bSMarcel Ziswiler PINCFG(PI6, RSVD1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 115f38f5f4bSMarcel Ziswiler PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 116f38f5f4bSMarcel Ziswiler PINCFG(PJ0, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 117f38f5f4bSMarcel Ziswiler PINCFG(PJ2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 118f38f5f4bSMarcel Ziswiler PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 119f38f5f4bSMarcel Ziswiler PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 120f38f5f4bSMarcel Ziswiler PINCFG(PJ7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 121f38f5f4bSMarcel Ziswiler PINCFG(PK0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 122f38f5f4bSMarcel Ziswiler PINCFG(PK1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 123f38f5f4bSMarcel Ziswiler PINCFG(PK2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 124f38f5f4bSMarcel Ziswiler PINCFG(PK3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 125f38f5f4bSMarcel Ziswiler PINCFG(PK4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 126f38f5f4bSMarcel Ziswiler PINCFG(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 127f38f5f4bSMarcel Ziswiler PINCFG(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 128f38f5f4bSMarcel Ziswiler PINCFG(PK7, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 129f38f5f4bSMarcel Ziswiler PINCFG(DAP1_FS_PN0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 130f38f5f4bSMarcel Ziswiler PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 131f38f5f4bSMarcel Ziswiler PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 132f38f5f4bSMarcel Ziswiler PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 133f38f5f4bSMarcel Ziswiler PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), 134f38f5f4bSMarcel Ziswiler PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), 135f38f5f4bSMarcel Ziswiler PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL), 136f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 137f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 138f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA1_PO2, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 139f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 140f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 141f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA4_PO5, ULPI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 142f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 143f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DATA6_PO7, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 144f38f5f4bSMarcel Ziswiler PINCFG(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 145f38f5f4bSMarcel Ziswiler PINCFG(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 146f38f5f4bSMarcel Ziswiler PINCFG(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 147f38f5f4bSMarcel Ziswiler PINCFG(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 148f38f5f4bSMarcel Ziswiler PINCFG(DAP4_FS_PP4, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 149f38f5f4bSMarcel Ziswiler PINCFG(DAP4_DIN_PP5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 150f38f5f4bSMarcel Ziswiler PINCFG(DAP4_DOUT_PP6, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 151f38f5f4bSMarcel Ziswiler PINCFG(DAP4_SCLK_PP7, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 152f38f5f4bSMarcel Ziswiler PINCFG(KB_COL0_PQ0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 153f38f5f4bSMarcel Ziswiler PINCFG(KB_COL1_PQ1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 154f38f5f4bSMarcel Ziswiler PINCFG(KB_COL2_PQ2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 155f38f5f4bSMarcel Ziswiler PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 156f38f5f4bSMarcel Ziswiler PINCFG(KB_COL4_PQ4, KBC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 157f38f5f4bSMarcel Ziswiler PINCFG(KB_COL5_PQ5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 158f38f5f4bSMarcel Ziswiler PINCFG(KB_COL6_PQ6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 159f38f5f4bSMarcel Ziswiler PINCFG(KB_COL7_PQ7, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 160f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW0_PR0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 161f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW1_PR1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 162f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW2_PR2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 163f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 164f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW4_PR4, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 165f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 166f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 167f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 168f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW8_PS0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 169f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW9_PS1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 170f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW10_PS2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 171f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW11_PS3, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 172f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW12_PS4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 173f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 174f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 175f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 176f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 177f38f5f4bSMarcel Ziswiler PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 178f38f5f4bSMarcel Ziswiler PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 179f38f5f4bSMarcel Ziswiler PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 180f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 181f38f5f4bSMarcel Ziswiler PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 182f38f5f4bSMarcel Ziswiler PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 183f38f5f4bSMarcel Ziswiler PINCFG(PU2, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 184f38f5f4bSMarcel Ziswiler PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 185f38f5f4bSMarcel Ziswiler PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 186f38f5f4bSMarcel Ziswiler PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 187f38f5f4bSMarcel Ziswiler PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 188f38f5f4bSMarcel Ziswiler PINCFG(PV0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 189f38f5f4bSMarcel Ziswiler PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 190f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 191f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 192f38f5f4bSMarcel Ziswiler PINCFG(DDC_SCL_PV4, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 193f38f5f4bSMarcel Ziswiler PINCFG(DDC_SDA_PV5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 194f38f5f4bSMarcel Ziswiler PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 195f38f5f4bSMarcel Ziswiler PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 196f38f5f4bSMarcel Ziswiler PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 197f38f5f4bSMarcel Ziswiler PINCFG(CLK2_OUT_PW5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 198f38f5f4bSMarcel Ziswiler PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 199f38f5f4bSMarcel Ziswiler PINCFG(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 200f38f5f4bSMarcel Ziswiler PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 201f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X1_AUD_PX1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 202f38f5f4bSMarcel Ziswiler PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 203f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X3_AUD_PX3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 204f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X4_AUD_PX4, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 205f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X5_AUD_PX5, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 206f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X6_AUD_PX6, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 207f38f5f4bSMarcel Ziswiler PINCFG(GPIO_X7_AUD_PX7, SPI2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 208f38f5f4bSMarcel Ziswiler PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 209f38f5f4bSMarcel Ziswiler PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 210f38f5f4bSMarcel Ziswiler PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 211f38f5f4bSMarcel Ziswiler PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 212f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 213f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 214f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 215f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 216f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 217f38f5f4bSMarcel Ziswiler PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 218f38f5f4bSMarcel Ziswiler PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 219f38f5f4bSMarcel Ziswiler PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 220f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 221f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 222f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 223f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 224f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 225f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 226f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 227f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 228f38f5f4bSMarcel Ziswiler PINCFG(PBB0, VGP6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 229f38f5f4bSMarcel Ziswiler PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 230f38f5f4bSMarcel Ziswiler PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 231f38f5f4bSMarcel Ziswiler PINCFG(PBB3, VGP3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 232f38f5f4bSMarcel Ziswiler PINCFG(PBB4, VGP4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 233f38f5f4bSMarcel Ziswiler PINCFG(PBB5, VGP5, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 234f38f5f4bSMarcel Ziswiler PINCFG(PBB6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 235f38f5f4bSMarcel Ziswiler PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 236f38f5f4bSMarcel Ziswiler PINCFG(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 237f38f5f4bSMarcel Ziswiler PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 238f38f5f4bSMarcel Ziswiler PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 239f38f5f4bSMarcel Ziswiler PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 240f38f5f4bSMarcel Ziswiler PINCFG(CLK2_REQ_PCC5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 241f38f5f4bSMarcel Ziswiler PINCFG(PEX_L0_RST_N_PDD1, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 242f38f5f4bSMarcel Ziswiler PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 243f38f5f4bSMarcel Ziswiler PINCFG(PEX_WAKE_N_PDD3, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 244f38f5f4bSMarcel Ziswiler PINCFG(PEX_L1_RST_N_PDD5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 245f38f5f4bSMarcel Ziswiler PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 246f38f5f4bSMarcel Ziswiler PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 247f38f5f4bSMarcel Ziswiler PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 248f38f5f4bSMarcel Ziswiler PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 249f38f5f4bSMarcel Ziswiler PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 250f38f5f4bSMarcel Ziswiler /* 251f38f5f4bSMarcel Ziswiler * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not 252f38f5f4bSMarcel Ziswiler * tristated and input driver enabled as well as it features some magic 253f38f5f4bSMarcel Ziswiler * properties even though the external loopback is disabled and the internal 254f38f5f4bSMarcel Ziswiler * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits 255f38f5f4bSMarcel Ziswiler * being set to 0xfffd according to the TRM! 256f38f5f4bSMarcel Ziswiler */ 257f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 258f38f5f4bSMarcel Ziswiler PINCFG(SDMMC3_CLK_LB_IN_PEE5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 259f38f5f4bSMarcel Ziswiler PINCFG(DP_HPD_PFF0, DP, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 260f38f5f4bSMarcel Ziswiler PINCFG(USB_VBUS_EN2_PFF1, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 261f38f5f4bSMarcel Ziswiler PINCFG(PFF2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 262f38f5f4bSMarcel Ziswiler PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 263f38f5f4bSMarcel Ziswiler PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 264f38f5f4bSMarcel Ziswiler PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 265f38f5f4bSMarcel Ziswiler PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 266f38f5f4bSMarcel Ziswiler PINCFG(OWR, RSVD2, NORMAL, TRISTATE, OUTPUT, DEFAULT, NORMAL), 267f38f5f4bSMarcel Ziswiler PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 268f38f5f4bSMarcel Ziswiler PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), 269f38f5f4bSMarcel Ziswiler }; 270f38f5f4bSMarcel Ziswiler 271f38f5f4bSMarcel Ziswiler #define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ 272f38f5f4bSMarcel Ziswiler { \ 273f38f5f4bSMarcel Ziswiler .drvgrp = PMUX_DRVGRP_##_drvgrp, \ 274f38f5f4bSMarcel Ziswiler .slwf = _slwf, \ 275f38f5f4bSMarcel Ziswiler .slwr = _slwr, \ 276f38f5f4bSMarcel Ziswiler .drvup = _drvup, \ 277f38f5f4bSMarcel Ziswiler .drvdn = _drvdn, \ 278f38f5f4bSMarcel Ziswiler .lpmd = PMUX_LPMD_##_lpmd, \ 279f38f5f4bSMarcel Ziswiler .schmt = PMUX_SCHMT_##_schmt, \ 280f38f5f4bSMarcel Ziswiler .hsm = PMUX_HSM_##_hsm, \ 281f38f5f4bSMarcel Ziswiler } 282f38f5f4bSMarcel Ziswiler 283f38f5f4bSMarcel Ziswiler static const struct pmux_drvgrp_config apalis_tk1_drvgrps[] = { 284f38f5f4bSMarcel Ziswiler }; 285f38f5f4bSMarcel Ziswiler 286f38f5f4bSMarcel Ziswiler #endif /* PINMUX_CONFIG_APALIS_TK1_H */ 287