| /openbmc/linux/Documentation/fb/ |
| H A D | viafb.modes | 10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
21 # Active Time 25.422 us 15.253 ms
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
46 # Active Time 20.317 us 12.800 ms
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
67 # Active Time 17.778 us 11.093 ms
73 mode "640x480-85"
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| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-spi.h | 7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
35 #include <asm/octeon/cvmx-gmxx-defs.h>
37 /* CSR typedefs have been moved to cvmx-csr-*.h */
90 * active) or as a halfplex (either the Tx data path is
91 * active or the Rx data path is active, but not both).
108 * active) or as a halfplex (either the Tx data path is
109 * active or the Rx data path is active, but not both).
117 * Return non-zero if the SPI interface has a SPI4000 attached
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 154 | 6 # Copyright (C) 2016-2017 Red Hat, Inc.
54 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
59 # X = non-zero data sector in backing file
60 # - = sector unallocated in whole backing chain
63 # 1. Tail unaligned: 00 00 -- --
64 # 2. Head unaligned: -- -- 00 00
65 # 3. Both unaligned: -- 00 00 --
66 # 4. Both, 2 clusters: -- -- -- 00 | 00 -- -- --
68 $QEMU_IO -c "write -z 0 2k" "$TEST_IMG" | _filter_qemu_io
69 $QEMU_IO -c "write -z 10k 2k" "$TEST_IMG" | _filter_qemu_io
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| /openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| H A D | sve.json | 12 …ption": "Counts speculatively executed predicated SVE operations with no active predicate elements…
16 …ion": "Counts speculatively executed predicated SVE operations with all predicate elements active."
20 …atively executed predicated SVE operations with at least one but not all active predicate elements…
24 …nts speculatively executed predicated SVE operations with at least one non active predicate elemen…
28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations."
32 …"PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations t…
36 …vely executed Advanced SIMD or SVE integer operations with the largest data type an 8-bit integer."
40 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 16-bit integer."
44 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 32-bit integer."
48 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 64-bit integer."
|
| /openbmc/qemu/include/hw/intc/ |
| H A D | armv7m_nvic.h | 13 #include "target/arm/cpu-qom.h"
27 /* Exception priorities can range from -3 to 255; only the unmodifiable
33 uint8_t active; member
54 * Entries in sec_vectors[] for non-banked exception numbers are unused.
66 * - vectpending
67 * - vectpending_is_secure
68 * - exception_prio
69 * - vectpending_prio
76 int exception_prio; /* group prio of the highest prio active exception */
91 * @secure: false for non-banked exceptions or for the nonsecure
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| /openbmc/linux/tools/testing/selftests/drivers/net/bonding/ |
| H A D | bond-eth-type-change.sh | 2 # SPDX-License-Identifier: GPL-2.0
20 ip -d l sh dev "$bonddev" | grep -q "MASTER"
23 ip -d l sh dev "$bonddev" | grep -q "SLAVE"
32 local devbond0="test-bond0"
33 local devbond1="test-bond1"
34 local devbond2="test-bond2"
35 local nonethdev="test-noneth0"
37 # create a non-ARPHRD_ETHER device for testing (e.g. nlmon type)
39 check_err $? "could not create a non-ARPHRD_ETHER device (nlmon)"
41 if [ $test_success -eq 1 ]; then
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| /openbmc/openbmc-test-automation/ipmi/ |
| H A D | test_ipmi_general.robot | 45 ${uuid}= Remove String ${uuid} -
63 # [channel_protocol_type]: IPMB-1.0
64 # [session_support]: multi-session
67 # [volatile(active)_settings]:
69 # [per-message_auth]: enabled
72 # [Non-Volatile Settings]:
74 # [per-message_auth]: enabled
79 ${active_channel_config}= Get Active Channel Config
102 # Verify volatile(active)_settings
103 …Valid Value disabled_ipmi_conf_map['${channel_info_ipmi['volatile(active)_settings']['alerting']}…
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| /openbmc/linux/arch/mips/cavium-octeon/executive/ |
| H A D | cvmx-spi.c | 7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <asm/octeon/cvmx-config.h>
36 #include <asm/octeon/cvmx-pko.h>
37 #include <asm/octeon/cvmx-spi.h>
39 #include <asm/octeon/cvmx-spxx-defs.h>
40 #include <asm/octeon/cvmx-stxx-defs.h>
41 #include <asm/octeon/cvmx-srxx-defs.h>
98 * active) or as a halfplex (either the Tx data path is
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| /openbmc/linux/Documentation/firmware-guide/acpi/ |
| H A D | gpio-properties.rst | 1 .. SPDX-License-Identifier: GPL-2.0
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } },
35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } },
55 active low or high, the "active_low" argument can be used here. Setting
56 it to 1 marks the GPIO as active low.
61 In our Bluetooth example the "reset-gpios" refers to the second GpioIo()
70 +-------------+-------------+-----------------------------------------------+
74 +-------------+-------------+-----------------------------------------------+
76 +-------------+-------------+-----------------------------------------------+
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| /openbmc/linux/Documentation/leds/ |
| H A D | ledtrig-transient.rst | 29 When the driver unregisters, deactivation routine for the currently active
36 that are active at the time driver gets suspended, continue to run, without
48 active, in which case LED state changes to LED_OFF.
54 deactivation routine, will cancel any timer that is active before it cleans
56 non-transient state. When driver gets suspended, irrespective of the transient
71 - duration allows setting timer value in msecs. The initial value is 0.
72 - activate allows activating and deactivating the timer specified by
75 - state allows user to specify a transient state to be held for the specified
79 - one shot timer activate mechanism.
86 deactivated state indicates that there is no active timer
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| /openbmc/linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_gt_types.h | 1 /* SPDX-License-Identifier: MIT */
54 * need to explicitly re-steer reads of registers of the other type.
56 * Only the replication types that may need additional non-default steering
69 * will always return a non-terminated value at instance (0, 0). We'll
182 bool active; member
193 * where engine is currently busy (active > 0).
198 * @start: Timestamp of the last idle to active transition.
200 * Idle is defined as active == 0, active is active > 0.
212 * Mask of the non fused CCS slices
250 * Should be taken before uncore->lock in cases where both are desired.
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | fsl-ls2080a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 /* DRAM space - 1, size : 2 GB DRAM */
20 gic: interrupt-controller@6000000 {
21 compatible = "arm,gic-v3";
24 #interrupt-cells = <3>;
25 interrupt-controller;
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|
| H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 /* DRAM space - 1, size : 2 GB DRAM */
20 gic: interrupt-controller@6000000 {
21 compatible = "arm,gic-v3";
24 #interrupt-cells = <3>;
25 interrupt-controller;
30 compatible = "arm,armv8-timer";
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| /openbmc/linux/Documentation/powerpc/ |
| H A D | transactional_memory.rst | 49 transactional or non-transactional accesses within the system. In this
50 example, the transaction completes as though it were normal straight-line code
69 - Conflicts with cache lines used by other processors
70 - Signals
71 - Context switches
72 - See the ISA for full documentation of everything that will abort transactions.
78 Syscalls made from within an active transaction will not be performed and the
90 Care must be taken when relying on syscalls to abort during active transactions
109 determine the transactional state -- if so, the second ucontext in uc->uc_link
110 represents the active transactional registers at the point of the signal.
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| /openbmc/linux/drivers/thunderbolt/ |
| H A D | dma_port.c | 1 // SPDX-License-Identifier: GPL-2.0
48 * struct tb_dma_port - DMA control port
68 u64 route = tb_cfg_get_route(pkg->buffer) & ~BIT_ULL(63); in dma_port_match()
70 if (pkg->frame.eof == TB_CFG_PKG_ERROR) in dma_port_match()
72 if (pkg->frame.eof != req->response_type) in dma_port_match()
74 if (route != tb_cfg_get_route(req->request)) in dma_port_match()
76 if (pkg->frame.size != req->response_size) in dma_port_match()
84 memcpy(req->response, pkg->buffer, req->response_size); in dma_port_copy()
107 return -ENOMEM; in dma_port_read()
109 req->match = dma_port_match; in dma_port_read()
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| /openbmc/openpower-hw-diags/analyzer/plugins/ |
| H A D | p10-tod-plugins.cpp | 16 /** Each chip is connected to two TOD topologies: active and backup. The values
22 ACTIVE = 0, enumerator
50 /** The chips sourcing the clocks to non-MDMT chips with faults. */
95 * @brief Indicates the given non-MDMT chip has seen a fault in the TOD
114 * @return The list of all chips sourcing the clocks for the non-MDMT chips
160 // - The associated IOHS target on this chip. in getChipSourcingClock()
161 // - Next, the IOHS target on the other side of the bus. in getChipSourcingClock()
162 // - Finally, the chip containing the IOHS target on the other side of the in getChipSourcingClock()
211 // TOD_PSS_MSS_STATUS[0:2] == 0b000 means active topology is primary. in collectTodFaultData()
212 topConfig[Topology::ACTIVE] = Configuration::PRIMARY; in collectTodFaultData()
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | tdm-slot.txt | 6 dai-tdm-slot-num : Number of slots in use.
7 dai-tdm-slot-width : Width in bits for each slot.
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
12 dai-tdm-slot-num = <2>;
13 dai-tdm-slot-width = <8>;
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
23 for an active slot as default, and the default active bits are at the LSB of
27 number presents bit-0 (LSB), second presents bit-1, etc. Any non zero
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| /openbmc/linux/drivers/net/wireless/ti/wl18xx/ |
| H A D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
59 u8 active[SCAN_MAX_BANDS]; /* number of active scan channels */ member
61 u8 passive_active; /* number of passive before active channels 2.4ghz */
66 u8 total_cycles; /* 0 - infinite */
85 * non periodic scans
90 * Must be 0 for non periodic scans.
|
| /openbmc/linux/Documentation/admin-guide/pm/ |
| H A D | intel_pstate.rst | 1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
57 ``intel_pstate`` can operate in two different modes, active or passive. In the
58 active mode, it uses its own internal performance scaling governor algorithm or
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | ds620.rst | 20 -----------
24 into non-volatile on-chip registers). Temperature range is -55 degree Celsius
31 output pin PO becomes active when the temperature falls below temp1_min and
32 stays active until the temperature goes above temp1_max.
35 output pin becomes active when the temperature goes above temp1_max and stays
36 active until the temperature falls below temp1_min.
38 The PO output pin of the DS620 operates active-low.
|
| /openbmc/docs/architecture/code-update/ |
| H A D | code-update.md | 5 - Static, non-UBI layout
6 - UBI layout - enabled via `obmc-ubi-fs` distro feature
17 - The UBI layout image is
18 `obmc-phosphor-image-<platform>-<timestamp>.ubi.mtd.tar`
19 - The static layout image is
20 `obmc-phosphor-image-<platform>-<timestamp>.static.mtd.tar`
22 The BMC tar image contains 5 files: u-boot, kernel, ro, and rw partitions and
31 version=2.7.0-dev
33 HashType=RSA-SHA256
39 - Method 1: Via Redfish Upload:
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| /openbmc/qemu/hw/intc/ |
| H A D | armv7m_nvic.c | 4 * Copyright (c) 2006-2007 CodeSourcery.
20 #include "hw/qdev-properties.h"
24 #include "target/arm/cpu-features.h"
25 #include "exec/exec-all.h"
33 * the num-irq property counts the number of external IRQ lines
44 * for (i = 1; i < s->num_irq; i++) to avoid the unused slot 0.
56 #define NVIC_MAX_IRQ (NVIC_MAX_VECTORS - NVIC_FIRST_IRQ)
58 /* Effective running priority of the CPU when no exception is active
62 /* Maximum priority of non-secure exceptions when AIRCR.PRIS is set */
71 if (qemu_irq_is_connected(s->sysresetreq)) { in signal_sysresetreq()
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| /openbmc/linux/net/mac80211/ |
| H A D | mesh_ps.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2012-2013, Marco Porsch <marco.porsch@s2005.tu-chemnitz.de>
4 * Copyright 2012-2013, cozybit Inc.
16 * mps_qos_null_get - create pre-addressed QoS Null frame for mesh powersave
21 struct ieee80211_sub_if_data *sdata = sta->sdata; in mps_qos_null_get()
22 struct ieee80211_local *local = sdata->local; in mps_qos_null_get()
28 skb = dev_alloc_skb(local->hw.extra_tx_headroom + size + 2); in mps_qos_null_get()
31 skb_reserve(skb, local->hw.extra_tx_headroom); in mps_qos_null_get()
35 ieee80211_fill_mesh_addresses(nullfunc, &fc, sta->sta.addr, in mps_qos_null_get()
36 sdata->vif.addr); in mps_qos_null_get()
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| /openbmc/linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-a64-amarula-relic.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
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| /openbmc/linux/tools/power/cpupower/utils/helpers/ |
| H A D | amd.c | 1 // SPDX-License-Identifier: GPL-2.0
14 /* ACPI P-States Helper Functions for AMD Processors ***************/
101 * cpu -> the cpu that gets evaluated
102 * boost_states -> how much boost states the machines support
105 * pstates -> a pointer to an array of size MAX_HW_PSTATES
108 * no -> amount of pstates above array got filled up with
110 * returns zero on success, -1 on failure
123 return -1; in decode_pstates()
126 return -1; in decode_pstates()
134 return -1; in decode_pstates()
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