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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-larb.yaml5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
23 - mediatek,mt6795-smi-larb
24 - mediatek,mt8167-smi-larb
25 - mediatek,mt8173-smi-larb
26 - mediatek,mt8183-smi-larb
27 - mediatek,mt8186-smi-larb
28 - mediatek,mt8188-smi-larb
[all …]
/openbmc/linux/drivers/memory/
H A Dmtk-smi.c20 #include <dt-bindings/memory/mt2701-larb-port.h>
39 /* SMI LARB */
152 struct mtk_smi_larb { /* larb: local arbiter */
165 struct mtk_smi_larb *larb = dev_get_drvdata(dev); in mtk_smi_larb_bind() local
171 larb->larbid = i; in mtk_smi_larb_bind()
172 larb->mmu = &larb_mmu[i].mmu; in mtk_smi_larb_bind()
173 larb->bank = larb_mmu[i].bank; in mtk_smi_larb_bind()
193 struct mtk_smi_larb *larb = dev_get_drvdata(dev); in mtk_smi_larb_config_port_gen1() local
194 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_config_port_gen1()
195 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); in mtk_smi_larb_config_port_gen1()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml42 SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb).
48 | | |... | | | ... There are different ports in each larb.
59 Normally we specify a local arbiter(larb) for each multimedia HW
61 in each larb. Take a example, There are many ports like MC, PP, VLD in the
65 smi-common and m4u, and additional GALS module between smi-larb and
121 Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
130 dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
131 dt-binding/memory/mt2712-larb-port.h for mt2712,
132 dt-binding/memory/mt6779-larb-port.h for mt6779,
133 dt-binding/memory/mt6795-larb-port.h for mt6795,
[all …]
/openbmc/linux/include/dt-bindings/memory/
H A Dmediatek,mt8188-memory-port.h14 * the index of larb is not in order. So we reindexed these larbs from a
48 * a) Make sure all the ports inside a larb are in one range.
69 /* LARB 0 -- VDO-0 */
78 /* LARB 1 -- VD0-0 */
87 /* LARB 2 -- VDO-1 */
94 /* LARB 3 -- VDO-1 */
103 /* LARB 4 -- VPP-0 */
112 /* LARB 5 -- VPP-1 */
122 /* LARB 6 -- VPP-1 */
128 /* LARB 7 -- WPE */
[all …]
H A Dmt8186-memory-port.h17 * a) Make sure all the ports inside a larb are in one range.
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
52 /* LARB 4 -- VDEC */
68 /* LARB 7 -- VENC */
83 /* LARB 8 -- WPE */
88 /* LARB 9 -- IMG-1 */
119 /* LARB 11 -- IMG-2 */
150 /* LARB 13 -- CAM */
[all …]
H A Dmt2701-larb-port.h12 * the first port's id for larb[N] would be the last port's id of larb[N - 1]
13 * plus one while larb[0]'s first port number is 0. The definition of
16 * offset for each larb, the first port's id for larb[N] would be (N * 32).
H A Dmtk-memory-port.h11 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) argument
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi10 #include <dt-bindings/memory/mt2701-larb-port.h>
59 larb0: larb@14010000 {
60 compatible = "mediatek,mt7623-smi-larb",
61 "mediatek,mt2701-smi-larb";
64 mediatek,larb-id = <0>;
71 larb1: larb@16010000 {
72 compatible = "mediatek,mt7623-smi-larb",
73 "mediatek,mt2701-smi-larb";
76 mediatek,larb-id = <1>;
83 larb2: larb@15001000 {
[all …]
H A Dmt2701.dtsi13 #include <dt-bindings/memory/mt2701-larb-port.h>
529 larb0: larb@14010000 {
530 compatible = "mediatek,mt2701-smi-larb";
533 mediatek,larb-id = <0>;
546 larb2: larb@15001000 {
547 compatible = "mediatek,mt2701-smi-larb";
550 mediatek,larb-id = <2>;
588 larb1: larb@16010000 {
589 compatible = "mediatek,mt2701-smi-larb";
592 mediatek,larb-id = <1>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi631 clock-names = "venc1-larb";
695 clock-names = "venc0-larb";
2008 larb4: larb@14013000 {
2009 compatible = "mediatek,mt8195-smi-larb";
2011 mediatek,larb-id = <4>;
2051 larb7: larb@14e04000 {
2052 compatible = "mediatek,mt8195-smi-larb";
2054 mediatek,larb-id = <7>;
2062 larb8: larb@14e05000 {
2063 compatible = "mediatek,mt8195-smi-larb";
[all …]
H A Dmt8167.dtsi9 #include <dt-bindings/memory/mt8167-larb-port.h>
142 larb0: larb@14016000 {
143 compatible = "mediatek,mt8167-smi-larb";
152 larb1: larb@15001000 {
153 compatible = "mediatek,mt8167-smi-larb";
162 larb2: larb@16010000 {
163 compatible = "mediatek,mt8167-smi-larb";
H A Dmt8192.dtsi12 #include <dt-bindings/memory/mt8192-larb-port.h>
1432 larb0: larb@14003000 {
1433 compatible = "mediatek,mt8192-smi-larb";
1435 mediatek,larb-id = <0>;
1442 larb1: larb@14004000 {
1443 compatible = "mediatek,mt8192-smi-larb";
1445 mediatek,larb-id = <1>;
1618 larb9: larb@1502e000 {
1619 compatible = "mediatek,mt8192-smi-larb";
1621 mediatek,larb-id = <9>;
[all …]
H A Dmt2712e.dtsi11 #include <dt-bindings/memory/mt2712-larb-port.h>
1000 larb0: larb@14021000 {
1001 compatible = "mediatek,mt2712-smi-larb";
1004 mediatek,larb-id = <0>;
1020 larb4: larb@14027000 {
1021 compatible = "mediatek,mt2712-smi-larb";
1024 mediatek,larb-id = <4>;
1031 larb5: larb@14030000 {
1032 compatible = "mediatek,mt2712-smi-larb";
1035 mediatek,larb-id = <5>;
[all …]
H A Dmt8186.dtsi1000 clock-names = "vdec0", "larb";
1070 clock-names = "venc0", "subsys-larb";
1081 "subsys-larb-ck",
1082 "subsys-larb-pclk";
1753 compatible = "mediatek,mt8186-smi-larb";
1758 mediatek,larb-id = <0>;
1764 compatible = "mediatek,mt8186-smi-larb";
1769 mediatek,larb-id = <1>;
1926 compatible = "mediatek,mt8186-smi-larb";
1931 mediatek,larb-id = <8>;
[all …]
H A Dmt6795.dtsi11 #include <dt-bindings/memory/mt6795-larb-port.h>
693 larb0: larb@14021000 {
694 compatible = "mediatek,mt6795-smi-larb";
699 mediatek,larb-id = <0>;
711 larb2: larb@15001000 {
712 compatible = "mediatek,mt6795-smi-larb";
717 mediatek,larb-id = <2>;
727 larb1: larb@16010000 {
728 compatible = "mediatek,mt6795-smi-larb";
731 mediatek,larb-id = <1>;
[all …]
H A Dmt8173.dtsi10 #include <dt-bindings/memory/mt8173-larb-port.h>
1281 larb0: larb@14021000 {
1282 compatible = "mediatek,mt8173-smi-larb";
1339 larb4: larb@14027000 {
1340 compatible = "mediatek,mt8173-smi-larb";
1355 larb2: larb@15001000 {
1356 compatible = "mediatek,mt8173-smi-larb";
1423 larb1: larb@16010000 {
1424 compatible = "mediatek,mt8173-smi-larb";
1439 larb3: larb@18001000 {
[all …]
H A Dmt8183.dtsi12 #include <dt-bindings/memory/mt8183-larb-port.h>
1844 larb0: larb@14017000 {
1845 compatible = "mediatek,mt8183-smi-larb";
1880 larb5: larb@15021000 {
1881 compatible = "mediatek,mt8183-smi-larb";
1890 larb2: larb@1502f000 {
1891 compatible = "mediatek,mt8183-smi-larb";
1906 larb1: larb@16010000 {
1907 compatible = "mediatek,mt8183-smi-larb";
1921 larb4: larb@17010000 {
[all …]
/openbmc/linux/drivers/iommu/
H A Dmtk_iommu_v1.c31 #include <dt-bindings/memory/mt2701-larb-port.h>
156 int larb = mt2701_m4u_to_larb(id); in mt2701_m4u_to_port() local
158 return id - mt2701_m4u_in_larb[larb]; in mt2701_m4u_to_port()
218 "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d\n", in mtk_iommu_v1_isr()
486 /* Link the consumer device with the smi-larb device(supplier) */ in mtk_iommu_v1_probe_device()
494 dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", in mtk_iommu_v1_probe_device()
H A Dmtk_iommu.c221 * The index is the same as iova_region and larb port numbers are
223 * For example, storing BIT(0) at index 2,1 means "larb 1, port0 is in region 2".
511 "fault type=0x%x iova=0x%llx pa=0x%llx master=0x%x(larb=%d port=%d) layer=%d %s\n", in mtk_iommu_isr()
574 dev_err(dev, "Can NOT find the region for larb(%d-%x).\n", in mtk_iommu_get_iova_region_id()
596 /* All ports should be in the same larb. just use 0 here */ in mtk_iommu_config()
604 dev_dbg(dev, "%s iommu for larb(%s) port 0x%lx region %d rgn-bank %d.\n", in mtk_iommu_config()
860 * Link the consumer device with the smi-larb device(supplier). in mtk_iommu_probe_device()
861 * The device that connects with each a larb is a independent HW. in mtk_iommu_probe_device()
871 dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", in mtk_iommu_probe_device()
1139 ret = of_property_read_u32(larbnode, "mediatek,larb-id", &id); in mtk_iommu_mm_dts_parse()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-subdev-decoder.yaml48 Lat soc is a hardware which is related with some larb(local arbiter) ports. For mt8195
49 platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and
201 #include <dt-bindings/memory/mt8192-larb-port.h>
H A Dmediatek-jpeg-encoder.yaml62 #include <dt-bindings/memory/mt2701-larb-port.h>
H A Dmediatek-jpeg-decoder.yaml68 #include <dt-bindings/memory/mt2701-larb-port.h>
H A Dmediatek,mdp3-wrot.yaml73 #include <dt-bindings/memory/mt8183-larb-port.h>
/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,wdma.yaml70 #include <dt-bindings/memory/mt8183-larb-port.h>
/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,wdma.yaml74 #include <dt-bindings/memory/mt8173-larb-port.h>

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