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/openbmc/qemu/hw/audio/
H A Dasc.c119 ASCState *s = container_of(fs, ASCState, fifos[fs->index]); in asc_fifo_get()
168 ASCFIFOState *fs = &s->fifos[i]; in generate_fifo()
260 if (s->fifos[0].cnt == 0 && s->fifos[1].cnt == 0) { in generate_fifo()
266 s->fifos[0].int_status |= ASC_FIFO_STATUS_HALF_FULL | in generate_fifo()
268 s->fifos[1].int_status |= ASC_FIFO_STATUS_HALF_FULL | in generate_fifo()
291 ASCFIFOState *fs = &s->fifos[channel >> 1]; in generate_wavetable()
378 ASCState *s = container_of(fs, ASCState, fifos[fs->index]); in asc_fifo_write()
443 prev = (s->fifos[0].int_status & 0x3) | in asc_read()
444 (s->fifos[1].int_status & 0x3) << 2; in asc_read()
446 s->fifos[0].int_status = 0; in asc_read()
[all …]
/openbmc/linux/include/linux/dma/
H A Dimx-dma.h42 IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */
72 * @n_fifos_src: Number of FIFOs for recording
73 * @n_fifos_dst: Number of FIFOs for playback
74 * @stride_fifos_src: FIFO address stride for recording, 0 means all FIFOs are
75 * continuous, 1 means 1 word stride between FIFOs. All stride
76 * between FIFOs should be same.
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml149 ti,mbox-num-fifos:
175 - ti,mbox-num-fifos
188 ti,mbox-num-fifos:
203 ti,mbox-num-fifos:
218 ti,mbox-num-fifos:
233 ti,mbox-num-fifos:
251 ti,mbox-num-fifos = <8>;
275 ti,mbox-num-fifos = <8>;
291 ti,mbox-num-fifos = <16>;
H A Dapple,mailbox.yaml14 The Apple mailbox consists of two FIFOs used to exchange 64+32 bit
17 One of the two FIFOs is used to send data to a co-processor while the other
/openbmc/linux/drivers/isdn/hardware/mISDN/
H A Dhfcsusb.c433 if (hw->fifos[HFCUSB_PCM_RX].pipe) { in open_dchannel()
552 if (hw->fifos[HFCUSB_PCM_RX].pipe) in hfc_dctrl()
961 /* receive completion routine for all ISO tx fifos */
1082 /* receive completion routine for all interrupt rx fifos */
1155 /* transmit completion routine for all ISO tx fifos */
1571 /* init the fifos */ in reset_hfcsusb()
1575 fifo = hw->fifos; in reset_hfcsusb()
1585 /* enable all fifos */ in reset_hfcsusb()
1603 if ((channel == HFC_CHAN_D) && (hw->fifos[HFCUSB_D_RX].active)) in hfcsusb_start_endpoint()
1605 if ((channel == HFC_CHAN_B1) && (hw->fifos[HFCUSB_B1_RX].active)) in hfcsusb_start_endpoint()
[all …]
H A Dhfcpci.c100 void *fifos; /* FIFO memory */ member
161 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci()
190 * and fifos is done.
226 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
329 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
332 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
358 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
361 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
462 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg()
608 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
[all …]
H A Dhfcsusb.h73 #define HFCUSB_NUM_FIFOS 8 /* maximum number of fifos */
236 /* structure defining input+output fifos (interrupt/bulk mode) */
241 __u8 indx; /* Fifos's ISO double buffer 0 or 1 ? */
285 struct usb_fifo fifos[HFCUSB_NUM_FIFOS]; member
/openbmc/linux/include/uapi/linux/
H A Dserial_core.h43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
44 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
45 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
47 #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
182 /* MCHP 16550A UART with 256 byte FIFOs */
/openbmc/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-chip-fifo.c25 /* Enable RXOVIE on _all_ RX FIFOs, not just the last one. in mcp251xfd_chip_rx_fifo_init_one()
27 * FIFOs hit by a RX MAB overflow and RXOVIE enabled will in mcp251xfd_chip_rx_fifo_init_one()
107 /* RX FIFOs */ in mcp251xfd_chip_fifo_init()
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Ddbg-tlv.h57 * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos
59 * @fid: fifos ids array. Used to determine what fifos to collect
138 * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
160 struct iwl_fw_ini_region_fifos fifos; member
350 * @IWL_FW_INI_REGION_TXF: TX fifos
/openbmc/linux/Documentation/devicetree/bindings/soc/ti/
H A Dk3-ringacc.yaml40 - description: fifos registers regions
49 - const: fifos
89 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi731 ti,mbox-num-fifos = <16>;
741 ti,mbox-num-fifos = <16>;
751 ti,mbox-num-fifos = <16>;
761 ti,mbox-num-fifos = <16>;
771 ti,mbox-num-fifos = <16>;
781 ti,mbox-num-fifos = <16>;
791 ti,mbox-num-fifos = <16>;
801 ti,mbox-num-fifos = <16>;
811 ti,mbox-num-fifos = <16>;
821 ti,mbox-num-fifos = <16>;
[all …]
H A Dk3-j721s2-main.dtsi834 ti,mbox-num-fifos = <16>;
844 ti,mbox-num-fifos = <16>;
854 ti,mbox-num-fifos = <16>;
864 ti,mbox-num-fifos = <16>;
874 ti,mbox-num-fifos = <16>;
884 ti,mbox-num-fifos = <16>;
894 ti,mbox-num-fifos = <16>;
904 ti,mbox-num-fifos = <16>;
914 ti,mbox-num-fifos = <16>;
924 ti,mbox-num-fifos = <16>;
[all …]
H A Dk3-j7200-main.dtsi150 ti,mbox-num-fifos = <16>;
160 ti,mbox-num-fifos = <16>;
170 ti,mbox-num-fifos = <16>;
180 ti,mbox-num-fifos = <16>;
190 ti,mbox-num-fifos = <16>;
200 ti,mbox-num-fifos = <16>;
210 ti,mbox-num-fifos = <16>;
220 ti,mbox-num-fifos = <16>;
230 ti,mbox-num-fifos = <16>;
240 ti,mbox-num-fifos = <16>;
[all …]
H A Dk3-am65-main.dtsi659 ti,mbox-num-fifos = <16>;
669 ti,mbox-num-fifos = <16>;
679 ti,mbox-num-fifos = <16>;
689 ti,mbox-num-fifos = <16>;
699 ti,mbox-num-fifos = <16>;
709 ti,mbox-num-fifos = <16>;
719 ti,mbox-num-fifos = <16>;
729 ti,mbox-num-fifos = <16>;
739 ti,mbox-num-fifos = <16>;
749 ti,mbox-num-fifos = <16>;
[all …]
/openbmc/qemu/rust/hw/char/pl011/src/
H A Dlib.rs162 /// - if the FIFOs are enabled, data written to this location is pushed onto
165 /// - if the FIFOs are not enabled, data is stored in the transmitter
176 /// - if the FIFOs are enabled, the data byte and the 4-bit status (break,
179 /// - if the FIFOs are not enabled, the data byte and status are stored in
352 /// FEN Enable FIFOs:
353 /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become
416 /// `FEN` "Enable FIFOs" or Device mode, field of [Line Control
419 /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become
/openbmc/qemu/include/hw/ssi/
H A Dbcm2835_spi.h34 * Though BCM2835 documentation says FIFOs have a capacity of 16,
35 * FIFOs are actually 16 words in size or effectively 64 bytes when operating
H A Dxilinx_spips.h109 /* GQSPI has separate tx/rx fifos */
116 * individual byte access. Since we use byte fifos, keep track of the
/openbmc/linux/drivers/net/ethernet/tehuti/
H A Dtehuti.h156 struct fifo m; /* minimal set of variables used by all fifos */
160 struct fifo m; /* minimal set of variables used by all fifos */
164 struct fifo m; /* minimal set of variables used by all fifos */
168 struct fifo m; /* minimal set of variables used by all fifos */
247 /* RX FIFOs: 1 for data (full) descs, and 2 for free descs */
253 /* Tx FIFOs: 1 for data desc, 1 for empty (acks) desc */
/openbmc/u-boot/drivers/serial/
H A Dserial_mvebu_a3700.c93 /* reset FIFOs */ in mvebu_serial_probe()
142 /* reset FIFOs */ in _debug_uart_init()
/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dserial.c113 * Force a flush of the RX FIFOs to work around a in lpc32xx_serial_init()
129 /* Force a flush of the RX FIFOs to work around a HW bug */ in lpc32xx_serial_init()
/openbmc/linux/Documentation/accel/qaic/
H A Daic100.rst93 channels, each consisting of a set of request/response FIFOs. Each active
95 hardware registers to manage the FIFOs (head/tail pointers), but requires host
96 memory to store the FIFOs.
240 Each DBC is a pair of FIFOs that manage data in and out of the workload. One
261 The actual FIFOs are backed by host memory. When sending a request to the QSM
262 to activate a network, the host must donate memory to be used for the FIFOs.
264 memory must be provided per DBC, which hosts both FIFOs. The request FIFO will
/openbmc/linux/drivers/usb/serial/
H A Dwhiteheat.h29 #define WHITEHEAT_PURGE 9 /* clear the UART fifos */
154 #define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
155 #define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
/openbmc/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_mbx.h168 * The layout above describes the format for the FIFOs used by the host
236 /* size of buffer to be stored in mailbox for FIFOs */
255 /* message FIFOs */
/openbmc/u-boot/arch/arm/dts/
H A Ddra7.dtsi700 ti,mbox-num-fifos = <8>;
714 ti,mbox-num-fifos = <12>;
728 ti,mbox-num-fifos = <12>;
742 ti,mbox-num-fifos = <12>;
756 ti,mbox-num-fifos = <12>;
770 ti,mbox-num-fifos = <12>;
784 ti,mbox-num-fifos = <12>;
798 ti,mbox-num-fifos = <12>;
812 ti,mbox-num-fifos = <12>;
826 ti,mbox-num-fifos = <12>;
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