| /openbmc/linux/drivers/bus/ |
| H A D | qcom-ssc-block-bus.c | 103 dev_err(dev, "error deasserting ssc_reset: %d\n", ret); in qcom_ssc_block_bus_init()
109 dev_err(dev, "error deasserting ssc_bcr: %d\n", ret); in qcom_ssc_block_bus_init()
117 dev_err(dev, "error deasserting ssc_xo_clk: %d\n", ret); in qcom_ssc_block_bus_init()
123 dev_err(dev, "error deasserting ssc_ahbs_clk: %d\n", ret); in qcom_ssc_block_bus_init()
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| /openbmc/linux/drivers/phy/broadcom/ |
| H A D | phy-bcm-ns-usb3.c | 93 /* Deasserting USB3 system reset */ in bcm_ns_usb3_phy_init_ns_bx()
143 /* Deasserting USB3 system reset */ in bcm_ns_usb3_phy_init_ns_ax()
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | cdns,qspi-nor-peripheral-props.yaml | 35 deasserting the device chip select (qspi_n_ss_out).
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | reset.rst | 110 self-deasserting reset control.
115 The reset controller API allows requesting self-deasserting reset controls as
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| /openbmc/qemu/hw/misc/macio/ |
| H A D | trace-events | 20 macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d"
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| /openbmc/linux/Documentation/devicetree/bindings/net/wireless/ |
| H A D | microchip,wilc1000.yaml | 39 and deasserting RESET. This should be declared as an
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| /openbmc/linux/include/linux/ |
| H A D | reset-controller.h | 12 * @reset: for self-deasserting resets, does all necessary
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| /openbmc/linux/arch/arm/mach-mvebu/ |
| H A D | platsmp-a9.c | 45 * Doing this before deasserting the CPUs is needed to wake up CPUs in mvebu_cortex_a9_boot_secondary()
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| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | main.c | 657 * JEDEC specs requires clocks to be stable before deasserting reset in __fsl_ddr_sdram()
660 * registers set but not enabled. Step 2 proceeds after deasserting in __fsl_ddr_sdram()
688 debug("Deasserting mem reset\n"); in __fsl_ddr_sdram()
691 debug("Deasserting mem reset missing\n"); in __fsl_ddr_sdram()
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| /openbmc/linux/drivers/reset/ |
| H A D | reset-bcm6345.c | 72 * deasserting the reset. Otherwise, the component may not be ready in bcm6345_reset_reset()
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| H A D | reset-lpc18xx.c | 59 * The LPC18xx RGU has mostly self-deasserting resets except for the
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| H A D | reset-ti-sci.c | 120 * argument set to false for deasserting the reset.
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| /openbmc/u-boot/include/ |
| H A D | smsc_sio1007.h | 11 * and SYSOPT1 pins at the deasserting edge of PCIRST#. The combination of
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| /openbmc/linux/drivers/reset/starfive/ |
| H A D | reset-starfive-jh71x0.c | 57 /* if the associated clock is gated, deasserting might otherwise hang forever */ in jh71x0_reset_update()
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| /openbmc/phosphor-led-manager/fault-monitor/ |
| H A D | fru-fault-monitor.hpp | 31 * and deasserting corresponding LED.
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| /openbmc/linux/drivers/reset/hisilicon/ |
| H A D | hi6220_reset.c | 133 * the clocks and deasserting reset, to avoid glitches. in hi6220_ao_deassert()
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| /openbmc/linux/drivers/clk/bcm/ |
| H A D | clk-bcm63268-timer.c | 124 * deasserting the reset. Otherwise, the component may not be ready in bcm63268_timer_reset_reset()
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| /openbmc/linux/drivers/gpu/drm/bridge/ |
| H A D | parade-ps8622.c | 364 * T2.min before deasserting the reset pin. If it takes T1.min for the in ps8622_pre_enable()
365 * power to rise, we need to wait at most T2.max before deasserting the in ps8622_pre_enable()
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | denali_dt.c | 185 * Deasserting the core reset while the register reset is asserted in denali_dt_probe()
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| /openbmc/u-boot/drivers/fpga/ |
| H A D | stratixII.c | 117 /* 2. Strat burn cycle by deasserting config for t_CFG and waiting t_CF2CK after reaserted */ in StratixII_ps_fpp_load()
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-gpio.c | 38 * or switching between two parents by asserting or deasserting the gpio.
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| H A D | clk-gemini.c | 221 * This is a self-deasserting reset controller.
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| /openbmc/u-boot/drivers/reset/ |
| H A D | reset-ti-sci.c | 143 * argument set to false for deasserting the reset.
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | smp.c | 72 * 7AP. We do not assume writes to the LVT deasserting IRQs
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| /openbmc/linux/drivers/gpu/drm/panel/ |
| H A D | panel-samsung-atna33xc20.c | 69 * specifies to wait 150 ms after deasserting EL3_ON before in atana33xc20_suspend()
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