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/openbmc/linux/sound/soc/sh/rcar/
H A Dctu.c1 // SPDX-License-Identifier: GPL-2.0
3 // ctu.c
10 #define CTU_NAME "ctu"
13 * User needs to setup CTU by amixer, and its settings are
16 * CTUn_CPMDR : amixser set "CTU Pass"
17 * CTUn_SV0xR : amixser set "CTU SV0"
18 * CTUn_SV1xR : amixser set "CTU SV1"
19 * CTUn_SV2xR : amixser set "CTU SV2"
20 * CTUn_SV3xR : amixser set "CTU SV3"
22 * [CTU Pass]
[all …]
H A Dmix.c1 // SPDX-License-Identifier: GPL-2.0
9 * +------+ +------+
10 * [SRC3 / SRC6] -> |CTU n0| -> [MIX n0| ->
11 * [SRC4 / SRC9] -> |CTU n1| -> [MIX n1| ->
12 * [SRC0 / SRC1] -> |CTU n2| -> [MIX n2| ->
13 * [SRC2 / SRC5] -> |CTU n3| -> [MIX n3| ->
14 * +------+ +------+
61 #define rsnd_mix_get(priv, id) ((struct rsnd_mix *)(priv->mix) + id)
62 #define rsnd_mix_nr(priv) ((priv)->mix_nr)
66 ((pos) = (struct rsnd_mix *)(priv)->mix + i); \
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-soc-rcar-objs := core.o gen.o dma.o adg.o ssi.o ssiu.o src.o ctu.o mix.o dvc.o cmd.o debugfs.o
3 obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o
/openbmc/linux/drivers/net/can/ctucanfd/
H A DKconfig2 tristate "CTU CAN-FD IP core" if COMPILE_TEST
4 This driver adds support for the CTU CAN FD open-source IP core.
8 is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
9 Implementation on Intel FPGA-based PCI Express board is available
10 from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and
11 on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).
12 Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .
15 tristate "CTU CAN-FD IP core PCI/PCIe driver"
19 This driver adds PCI/PCIe support for CTU CAN-FD IP core.
22 at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .
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H A Dctucanfd_platform.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
40 * ctucan_platform_probe - Platform registration call
50 struct device *dev = &pdev->dev; in ctucan_platform_probe()
83 * ctucan_platform_remove - Unregister the device after releasing the resources
97 pm_runtime_disable(&pdev->dev); in ctucan_platform_remove()
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H A Dctucanfd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2021 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
57 * ctucan_probe_common - Device type independent registration call
63 * @addr: Base address of CTU CAN FD core address
H A Dctucanfd_kframe.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2021 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
H A Dctucanfd_pci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
68 list_add(&priv->peers_on_pdev, &bdata->ndev_list_head); in ctucan_pci_set_drvdata()
69 priv->irq_flags = IRQF_SHARED; in ctucan_pci_set_drvdata()
73 * ctucan_pci_probe - PCI registration call
85 struct device *dev = &pdev->dev; in ctucan_pci_probe()
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H A Dctucanfd_base.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
49 * - when a buffer transitions to empty state, rotate order and priorities
50 * - if more buffers seem to transition at the same time, rotate by the number of buffers
51 * - it may be assumed that buffers transition to empty state in FIFO order (because we manage
53 * - at frame filling, do not rotate anything, just increment buffer modulo counter
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H A Dctucanfd_kregs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2022 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # Makefile for the CTU CAN-FD IP module drivers
6 obj-$(CONFIG_CAN_CTUCANFD) := ctucanfd.o
7 ctucanfd-y := ctucanfd_base.o
9 obj-$(CONFIG_CAN_CTUCANFD_PCI) += ctucanfd_pci.o
10 obj-$(CONFIG_CAN_CTUCANFD_PLATFORM) += ctucanfd_platform.o
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dctu,ctucanfd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CTU CAN FD Open-source IP Core
10 Open-source CAN FD IP core developed at the Czech Technical University in Prague
18 [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
21 …https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-…
24 - Pavel Pisa <pisa@cmp.felk.cvut.cz>
25 - Ondrej Ille <ondrej.ille@gmail.com>
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drenesas,rsnd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Sound Driver
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
13 port-def:
14 $ref: audio-graph-port.yaml#/definitions/port-base
17 "^endpoint(@[0-9a-f]+)?":
18 $ref: audio-graph-port.yaml#/definitions/endpoint-base
21 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
H A Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
25 Multi channel is supported by Multi-SSI, or TDM-SSI.
27 Multi-SSI : 6ch case, you can use stereo x 3 SSI
28 TDM-SSI : 6ch case, you can use TDM
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/openbmc/qemu/docs/system/devices/
H A Dcan.rst20 In 2020, CTU CAN FD controller model has been added as part
22 open-source/design/hardware solution. The core designer
24 provided by CTU, and more companies including Volkswagen subsidiaries.
34 ----------------------------------------------------------
38 (1) CAN bus Kvaser PCI CAN-S (single SJA1000 channel) board. QEMU startup options::
40 -object can-bus,id=canbus0
41 -device kvaser_pci,canbus=canbus0
43 Add "can-host-socketcan" object to connect device to host system CAN bus::
45 -object can-host-socketcan,id=canhost0,if=can0,canbus=canbus0
47 (2) CAN bus PCM-3680I PCI (dual SJA1000 channel) emulation::
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/openbmc/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 CTU CAN FD Driver
9 About CTU CAN FD IP Core
10 ------------------------
12 `CTU CAN FD <https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core>`_
16 of `FEE <http://www.fel.cvut.cz/en/>`_ at `CTU <https://www.cvut.cz/en>`_.
19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_
20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board
21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_
23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core.
[all …]
/openbmc/qemu/hw/net/can/
H A Dctu_can_fd_frame.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2020 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2020 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
H A Dctucan_pci.c2 * CTU CAN FD PCI device emulation
34 #include "hw/qdev-properties.h"
86 ctucan_hardware_reset(&d->ctucan_state[i]); in ctucan_pci_reset()
100 tmp &= ((uint64_t)1 << (size << 3)) - 1; in ctucan_pci_id_cra_io_read()
122 s = &d->ctucan_state[core_num]; in ctucan_pci_cores_io_read()
138 s = &d->ctucan_state[core_num]; in ctucan_pci_cores_io_write()
169 pci_conf = pci_dev->config; in ctucan_pci_realize()
172 d->irq = pci_allocate_irq(&d->dev); in ctucan_pci_realize()
175 ctucan_init(&d->ctucan_state[i], d->irq); in ctucan_pci_realize()
179 if (ctucan_connect_to_bus(&d->ctucan_state[i], d->canbus[i]) < 0) { in ctucan_pci_realize()
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H A Dctu_can_fd_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * CTU CAN FD IP Core
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2020 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2020 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
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H A Dr8a7745.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7745-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
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H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
45 compatible = "fixed-clock";
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/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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/openbmc/linux/Documentation/networking/device_drivers/can/
H A Dindex.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
14 ctu/ctucanfd-driver

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