cpu\-capacity (full) in projects: openbmc

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/openbmc/linux/Documentation/scheduler/
H A D	sched-capacity.rst	2 Capacity Aware Scheduling 5 1. CPU Capacity 9 ---------------- 13 different performance characteristics - on such platforms, not all CPUs can be 16 CPU capacity is a measure of the performance a CPU can reach, normalized against 17 the most performant CPU in the system. Heterogeneous systems are also called 18 asymmetric CPU capacity systems, as they contain CPUs of different capacities. 20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems 23 - not all CPUs may have the same microarchitecture (µarch). 24 - with Dynamic Voltage and Frequency Scaling (DVFS), not all CPUs may be [all …]
H A D	sched-energy.rst	6 --------------- 10 Energy Model (EM) of the CPUs to select an energy efficient CPU for each task, 17 /!\ EAS does not support platforms with symmetric CPU topologies /!\ 19 EAS operates only on heterogeneous CPU topologies (such as Arm big.LITTLE) 25 please refer to its documentation (see Documentation/power/energy-model.rst). 29 ----------------------------- 32 - energy = [joule] (resource like a battery on powered devices) 33 - power = energy/time = [joule/second] = [watt] 39 -------------------- 45 ----------- [all …]
H A D	schedutil.rst	7 All this assumes a linear relation between frequency and work capacity, 15 individual tasks to task-group slices to CPU runqueues. As the basis for this 31 Note that blocked tasks still contribute to the aggregates (task-group slices 32 and CPU runqueues), which reflects their expected contribution when they 36 reflects the time an entity spends on the CPU, while 'runnable' reflects the 38 two metrics are the same, but once there is contention for the CPU 'running' 39 will decrease to reflect the fraction of time each task spends on the CPU 45 Frequency / CPU Invariance 48 Because consuming the CPU for 50% at 1GHz is not the same as consuming the CPU 49 for 50% at 2GHz, nor is running 50% on a LITTLE CPU the same as running 50% on [all …]
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A D	cpu-capacity.txt	2 CPU capacity bindings 6 1 - Introduction 15 2 - CPU capacity definition 18 CPU capacity is a number that provides the scheduler information about CPUs 19 heterogeneity. Such heterogeneity can come from micro-architectural differences 23 capture a first-order approximation of the relative performance of CPUs. 25 CPU capacities are obtained by running a suitable benchmark. This binding makes 27 final capacity should, however, be: 29 * A "single-threaded" or CPU affine benchmark 30 * Divided by the running frequency of the CPU executing the benchmark [all …]
/openbmc/linux/arch/arm/kernel/
H A D	topology.c	15 #include <linux/cpu.h> 29 #include <asm/cpu.h> 34 * cpu capacity scale management 38 * cpu capacity table 39 * This per cpu data structure describes the relative capacity of each core. 40 * On a heteregenous system, cores don't have the same computation capacity 42 * can take this difference into account during load balance. A per cpu 43 * structure is preferred because each CPU updates its own cpu_capacity field 61 * is used to compute the capacity of a CPU. 66 {"arm,cortex-a15", 3891}, [all …]
/openbmc/linux/Documentation/translations/zh_CN/scheduler/
H A D	sched-capacity.rst	1 .. SPDX-License-Identifier: GPL-2.0 2 .. include:: ../disclaimer-zh_CN.rst 4 :Original: Documentation/scheduler/sched-capacity.rst 22 -------- 27 我们引入CPU算力（capacity）的概念来测量每个CPU能达到的性能，它的值相对系统中性能最强的CPU 32 - 不是所有CPU的微架构都相同。 33 - 在动态电压频率升降（Dynamic Voltage and Frequency Scaling，DVFS）框架中，不是所有的CPU都 34 能达到一样高的操作性能值（Operating Performance Points，OPP。译注，也就是“频率-电压”对）。 42 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu) 45 -------------- [all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A D	exynos5422-cpus.dtsi	`1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos5422 SoC cpu device tree source 8 * This file provides desired ordering for Exynos5422: CPU[0123] being the A7. 10 * The Exynos5420, 5422 and 5800 actually share the same CPU configuration 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 15 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting 16 * from the LITTLE: Cortex-A7. 21 #address-cells = <1>; 22 #size-cells = <0>; 24 cpu-map { [all …]`
H A D	exynos5420-cpus.dtsi	`1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos5420 SoC cpu device tree source 9 * boards: CPU[0123] being the A15. 11 * The Exynos5420, 5422 and 5800 actually share the same CPU configuration 14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 16 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting 17 * from the LITTLE: Cortex-A7. 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]`
/openbmc/linux/drivers/base/
H A D	arch_topology.c	1 // SPDX-License-Identifier: GPL-2.0 3 * Arch specific cpu topology information 11 #include <linux/cpu.h> 63 int cpu; in topology_set_scale_freq_source() local 74 for_each_cpu(cpu, cpus) { in topology_set_scale_freq_source() 75 sfd = rcu_dereference(*per_cpu_ptr(&sft_data, cpu)); in topology_set_scale_freq_source() 78 if (!sfd \|\| sfd->source != SCALE_FREQ_SOURCE_ARCH) { in topology_set_scale_freq_source() 79 rcu_assign_pointer(per_cpu(sft_data, cpu), data); in topology_set_scale_freq_source() 80 cpumask_set_cpu(cpu, &scale_freq_counters_mask); in topology_set_scale_freq_source() 94 int cpu; in topology_clear_scale_freq_source() local [all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A D	meson-gxm.dtsi	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 16 cpu = <&cpu0>; 19 cpu = <&cpu1>; 22 cpu = <&cpu2>; 25 cpu = <&cpu3>; 31 cpu = <&cpu4>; 34 cpu = <&cpu5>; [all …]`
H A D	meson-g12b.dtsi	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-g12.dtsi" 13 #address-cells = <0x2>; 14 #size-cells = <0x0>; 16 cpu-map { 19 cpu = <&cpu0>; 23 cpu = <&cpu1>; 29 cpu = <&cpu100>; 33 cpu = <&cpu101>; 37 cpu = <&cpu102>; [all …]`
/openbmc/linux/arch/arm64/boot/dts/apple/
H A D	t6002.dtsi	`1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 15 #include "multi-die-cpp.h" 17 #include "t600x-common.dtsi" 20 compatible = "apple,t6002", "apple,arm-platform"; 22 #address-cells = <2>; 23 #size-cells = <2>; [all …]`
H A D	t600x-common.dtsi	`1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 11 #address-cells = <2>; 12 #size-cells = <2>; 15 #address-cells = <2>; 16 #size-cells = <0>; 18 cpu-map { 21 cpu = <&cpu_e00>; 24 cpu = <&cpu_e01>; 30 cpu = <&cpu_p00>; 33 cpu = <&cpu_p01>; [all …]`
/openbmc/linux/include/linux/sched/
H A D	sd_flags.h	1 /* SPDX-License-Identifier: GPL-2.0 / 3 sched-domains (multiprocessor balancing) flag declarations. 29 * certain level (e.g. domain starts spanning CPUs outside of the base CPU's 78 * Consider waking task on waking CPU. 85 * Domain members have different CPU capacities 89 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups. 94 * Domain members have different CPU capacities spanning all unique CPU 95 * capacity values. 98 * all available CPU capacities are visible 99 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups. [all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A D	juno-r2.dts	`9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/arm/coresight-cti-dt.h> 13 #include "juno-base.dtsi" 14 #include "juno-cs-r1r2.dtsi" 18 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress"; 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 28 stdout-path = "serial0:115200n8"; [all …]`
H A D	juno.dts	`4 * Copyright (c) 2013-2014 ARM Ltd. 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/arm/coresight-cti-dt.h> 13 #include "juno-base.dtsi" 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 27 stdout-path = "serial0:115200n8"; 31 compatible = "arm,psci-0.2"; [all …]`
H A D	juno-r1.dts	`9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/arm/coresight-cti-dt.h> 13 #include "juno-base.dtsi" 14 #include "juno-cs-r1r2.dtsi" 18 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress"; 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 28 stdout-path = "serial0:115200n8"; [all …]`
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A D	cpus.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V CPUs 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 This document uses some terminology common to the RISC-V community 19 mandated by the RISC-V ISA: a PC and some registers. This 27 - $ref: /schemas/cpu.yaml# [all …]`
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A D	opp-v2-kryo-cpu.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 13 - $ref: opp-v2-base.yaml# 17 the CPU frequencies subset and voltage value of each OPP varies based on 22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 25 operating-points-v2 table when it is parsed by the OPP framework. 29 const: operating-points-v2-kryo-cpu [all …]
/openbmc/linux/kernel/sched/
H A D	fair.c	1 // SPDX-License-Identifier: GPL-2.0 43 #include <linux/memory-tiers.h> 61 * The initial- and re-scaling of tunables is configurable 65 * SCHED_TUNABLESCALING_NONE - unscaled, always 1 66 SCHED_TUNABLESCALING_LOG - scaled logarithmical, 1+ilog(ncpus) 67 SCHED_TUNABLESCALING_LINEAR - scaled linear, ncpus 74 Minimal preemption granularity for CPU 106 arch_asym_cpu_priority(int cpu) arch_asym_cpu_priority() argument 334 int cpu = cpu_of(rq); list_add_leaf_cfs_rq() local 1353 is_core_idle(int cpu) is_core_idle() argument 2046 numa_idle_core(int idle_core,int cpu) numa_idle_core() argument 2062 numa_idle_core(int idle_core,int cpu) numa_idle_core() argument 2078 int cpu, idle_core = -1; update_numa_stats() local 2121 int cpu; task_numa_assign() local 2348 int cpu = env->dst_stats.idle_cpu; task_numa_compare() local 2394 int cpu; task_numa_find_cpu() local 2980 int cpu = cpupid_to_cpu(cpupid); task_numa_group() local 4985 util_fits_cpu(unsigned long util,unsigned long uclamp_min,unsigned long uclamp_max,int cpu) util_fits_cpu() argument 4988 unsigned long capacity = capacity_of(cpu); util_fits_cpu() local 5101 task_fits_cpu(struct task_struct * p,int cpu) task_fits_cpu() argument 6283 sync_throttle(struct task_group * tg,int cpu) sync_throttle() argument 6548 int cpu = cpu_of(rq); sched_fair_update_stop_tick() local 6580 sync_throttle(struct task_group * tg,int cpu) sync_throttle() argument 6674 cpu_overutilized(int cpu) cpu_overutilized() argument 6722 sched_idle_cpu(int cpu) sched_idle_cpu() argument 6976 capacity_of(int cpu) capacity_of() argument 7194 find_idlest_cpu(struct sched_domain * sd,struct task_struct * p,int cpu,int prev_cpu,int sd_flag) find_idlest_cpu() argument 7246 __select_idle_cpu(int cpu,struct task_struct * p) __select_idle_cpu() argument 7259 set_idle_cores(int cpu,int val) set_idle_cores() argument 7268 test_idle_cores(int cpu) test_idle_cores() argument 7289 int cpu; __update_idle_core() local 7316 int cpu; select_idle_core() local 7346 int cpu; select_idle_smt() local 7366 set_idle_cores(int cpu,int val) set_idle_cores() argument 7370 test_idle_cores(int cpu) test_idle_cores() argument 7395 int i, cpu, idle_cpu = -1, nr = INT_MAX; select_idle_cpu() local 7490 int cpu, best_cpu = -1; select_idle_capacity() local 7536 asym_fits_cpu(unsigned long util,unsigned long util_min,unsigned long util_max,int cpu) asym_fits_cpu() argument 7697 cpu_util(int cpu,struct task_struct * p,int dst_cpu,int boost) cpu_util() argument 7761 cpu_util_cfs(int cpu) cpu_util_cfs() argument 7766 cpu_util_cfs_boost(int cpu) cpu_util_cfs_boost() argument 7784 cpu_util_without(int cpu,struct task_struct * p) cpu_util_without() argument 7855 int cpu; eenv_pd_busy_time() local 7878 int cpu; eenv_pd_max_util() local 7963 int cpu, best_energy_cpu, target = -1; find_energy_efficient_cpu() local 8159 int cpu = smp_processor_id(); select_task_rq_fair() local 8942 int cpu; can_migrate_task() local 9325 int cpu = cpu_of(rq); __update_blocked_fair() local 9429 update_blocked_averages(int cpu) update_blocked_averages() argument 9510 scale_rt_capacity(int cpu) scale_rt_capacity() argument 9540 update_cpu_capacity(struct sched_domain * sd,int cpu) update_cpu_capacity() argument 9542 unsigned long capacity = scale_rt_capacity(cpu); update_cpu_capacity() local 9558 update_group_capacity(struct sched_domain * sd,int cpu) update_group_capacity() argument 9562 unsigned long capacity, min_capacity, max_capacity; update_group_capacity() local 9762 sched_use_asym_prio(struct sched_domain * sd,int cpu) sched_use_asym_prio() argument 10174 task_running_on_cpu(int cpu,struct task_struct * p) task_running_on_cpu() argument 10193 idle_cpu_without(int cpu,struct task_struct * p) idle_cpu_without() argument 11004 unsigned long capacity, load, util; find_busiest_queue() local 11214 int cpu, idle_smt = -1; should_we_balance() local 11711 int cpu = rq->cpu; rebalance_domains() local 11869 int nr_busy, i, cpu = rq->cpu; nohz_balancer_kick() local 11982 set_cpu_sd_state_busy(int cpu) set_cpu_sd_state_busy() argument 12012 set_cpu_sd_state_idle(int cpu) set_cpu_sd_state_idle() argument 12032 nohz_balance_enter_idle(int cpu) nohz_balance_enter_idle() argument 12091 unsigned int cpu = rq->cpu; update_nohz_stats() local 12236 nohz_run_idle_balance(int cpu) nohz_run_idle_balance() argument 12592 task_is_throttled_fair(struct task_struct * p,int cpu) task_is_throttled_fair() argument 12920 int cpu; unregister_fair_sched_group() local 12944 init_tg_cfs_entry(struct task_group * tg,struct cfs_rq * cfs_rq,struct sched_entity * se,int cpu,struct sched_entity * parent) init_tg_cfs_entry() argument 13184 print_cfs_stats(struct seq_file * m,int cpu) print_cfs_stats() argument [all...]
H A D	topology.c	1 // SPDX-License-Identifier: GPL-2.0 35 static int sched_domain_debug_one(struct sched_domain sd, int cpu, int level, in sched_domain_debug_one() argument 38 struct sched_group group = sd->groups; in sched_domain_debug_one() 39 unsigned long flags = sd->flags; in sched_domain_debug_one() 44 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level); in sched_domain_debug_one() 46 cpumask_pr_args(sched_domain_span(sd)), sd->name); in sched_domain_debug_one() 48 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { in sched_domain_debug_one() 49 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu); in sched_domain_debug_one() 51 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) { in sched_domain_debug_one() 52 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu); in sched_domain_debug_one() [all …]
/openbmc/linux/include/linux/
H A D	energy_model.h	1 /* SPDX-License-Identifier: GPL-2.0 / 14 struct em_perf_state - Performance state of a performance domain 16 * @power: The power consumed at this level (by 1 CPU or by a registered 40 * struct em_perf_domain - Performance domain 49 * In case of CPU device, a "performance domain" represents a group of CPUs 51 * must have the same micro-architecture. Performance domains often have 52 * a 1-to-1 mapping with CPUFreq policies. In case of other devices the @cpus 65 * EM_PERF_DOMAIN_MICROWATTS: The power values are in micro-Watts or some 78 #define em_span_cpus(em) (to_cpumask((em)->cpus)) 79 #define em_is_artificial(em) ((em)->flags & EM_PERF_DOMAIN_ARTIFICIAL) [all …]
/openbmc/linux/Documentation/admin-guide/pm/
H A D	cpufreq.rst	1 .. SPDX-License-Identifier: GPL-2.0 7 CPU Performance Scaling 15 The Concept of CPU Performance Scaling 20 Operating Performance Points or P-states (in ACPI terminology). As a rule, 22 can be retired by the CPU over a unit of time, but also the higher the clock 24 time (or the more power is drawn) by the CPU in the given P-state. Therefore 25 there is a natural tradeoff between the CPU capacity (the number of instructions 26 that can be executed over a unit of time) and the power drawn by the CPU. 29 as possible and then there is no reason to use any P-states different from the 30 highest one (i.e. the highest-performance frequency/voltage configuration [all …]
/openbmc/linux/include/uapi/linux/sched/
H A D	types.h	1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / 41 Sporadic Time-Constrained Task Attributes 44 * A subset of sched_attr attributes allows to describe a so-called 45 * sporadic time-constrained task. 48 * - the activation period or minimum instance inter-arrival time; 49 * - the maximum (or average, depending on the actual scheduling 51 * - the deadline (relative to the actual activation time) of each 54 * some specific computation --which is typically called an instance-- 86 * represents the percentage of CPU time used by a task when running at the 87 * maximum frequency on the highest capacity CPU of the system. For example, a [all …]
/openbmc/linux/arch/powerpc/platforms/pseries/
H A D	lparcfg.c	`1 // SPDX-License-Identifier: GPL-2.0-or-later 14 * keyword - value pairs that specify the configuration of the partition. 22 #include <asm/papr-sysparm.h> 94 * R4 = Entitled Processor Capacity Percentage. 95 * R5 = Unallocated Processor Capacity Percentage. 97 * XXXX - reserved (0) 98 * XXXX - reserved (0) 99 * XXXX - Group Number 100 * XXXX - Pool Number. 102 * XX - reserved. (0) [all …]`

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