1c35f6dc5SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2c35f6dc5SNeil Armstrong/* 3c35f6dc5SNeil Armstrong * Copyright (c) 2019 BayLibre, SAS 4c35f6dc5SNeil Armstrong * Author: Neil Armstrong <narmstrong@baylibre.com> 5c35f6dc5SNeil Armstrong */ 6c35f6dc5SNeil Armstrong 79ed437d6SJerome Brunet#include "meson-g12.dtsi" 8c35f6dc5SNeil Armstrong 9c35f6dc5SNeil Armstrong/ { 10c35f6dc5SNeil Armstrong compatible = "amlogic,g12b"; 11c35f6dc5SNeil Armstrong 12c35f6dc5SNeil Armstrong cpus { 131499218cSNeil Armstrong #address-cells = <0x2>; 141499218cSNeil Armstrong #size-cells = <0x0>; 151499218cSNeil Armstrong 16c35f6dc5SNeil Armstrong cpu-map { 17c35f6dc5SNeil Armstrong cluster0 { 18c35f6dc5SNeil Armstrong core0 { 19c35f6dc5SNeil Armstrong cpu = <&cpu0>; 20c35f6dc5SNeil Armstrong }; 21c35f6dc5SNeil Armstrong 22c35f6dc5SNeil Armstrong core1 { 23c35f6dc5SNeil Armstrong cpu = <&cpu1>; 24c35f6dc5SNeil Armstrong }; 25c35f6dc5SNeil Armstrong }; 26c35f6dc5SNeil Armstrong 27c35f6dc5SNeil Armstrong cluster1 { 28c35f6dc5SNeil Armstrong core0 { 29c35f6dc5SNeil Armstrong cpu = <&cpu100>; 30c35f6dc5SNeil Armstrong }; 31c35f6dc5SNeil Armstrong 32c35f6dc5SNeil Armstrong core1 { 33c35f6dc5SNeil Armstrong cpu = <&cpu101>; 34c35f6dc5SNeil Armstrong }; 35c35f6dc5SNeil Armstrong 36c35f6dc5SNeil Armstrong core2 { 37c35f6dc5SNeil Armstrong cpu = <&cpu102>; 38c35f6dc5SNeil Armstrong }; 39c35f6dc5SNeil Armstrong 40c35f6dc5SNeil Armstrong core3 { 41c35f6dc5SNeil Armstrong cpu = <&cpu103>; 42c35f6dc5SNeil Armstrong }; 43c35f6dc5SNeil Armstrong }; 44c35f6dc5SNeil Armstrong }; 45c35f6dc5SNeil Armstrong 461499218cSNeil Armstrong cpu0: cpu@0 { 471499218cSNeil Armstrong device_type = "cpu"; 481499218cSNeil Armstrong compatible = "arm,cortex-a53"; 491499218cSNeil Armstrong reg = <0x0 0x0>; 501499218cSNeil Armstrong enable-method = "psci"; 516eeaf4d2SFrank Hartung capacity-dmips-mhz = <592>; 521499218cSNeil Armstrong next-level-cache = <&l2>; 53195f1403SGuillaume La Roque #cooling-cells = <2>; 541499218cSNeil Armstrong }; 551499218cSNeil Armstrong 561499218cSNeil Armstrong cpu1: cpu@1 { 571499218cSNeil Armstrong device_type = "cpu"; 581499218cSNeil Armstrong compatible = "arm,cortex-a53"; 591499218cSNeil Armstrong reg = <0x0 0x1>; 601499218cSNeil Armstrong enable-method = "psci"; 616eeaf4d2SFrank Hartung capacity-dmips-mhz = <592>; 621499218cSNeil Armstrong next-level-cache = <&l2>; 63195f1403SGuillaume La Roque #cooling-cells = <2>; 641499218cSNeil Armstrong }; 65c35f6dc5SNeil Armstrong 66c35f6dc5SNeil Armstrong cpu100: cpu@100 { 67c35f6dc5SNeil Armstrong device_type = "cpu"; 68c35f6dc5SNeil Armstrong compatible = "arm,cortex-a73"; 69c35f6dc5SNeil Armstrong reg = <0x0 0x100>; 70c35f6dc5SNeil Armstrong enable-method = "psci"; 716eeaf4d2SFrank Hartung capacity-dmips-mhz = <1024>; 72c35f6dc5SNeil Armstrong next-level-cache = <&l2>; 73195f1403SGuillaume La Roque #cooling-cells = <2>; 74c35f6dc5SNeil Armstrong }; 75c35f6dc5SNeil Armstrong 76c35f6dc5SNeil Armstrong cpu101: cpu@101 { 77c35f6dc5SNeil Armstrong device_type = "cpu"; 78c35f6dc5SNeil Armstrong compatible = "arm,cortex-a73"; 79c35f6dc5SNeil Armstrong reg = <0x0 0x101>; 80c35f6dc5SNeil Armstrong enable-method = "psci"; 816eeaf4d2SFrank Hartung capacity-dmips-mhz = <1024>; 82c35f6dc5SNeil Armstrong next-level-cache = <&l2>; 83195f1403SGuillaume La Roque #cooling-cells = <2>; 84c35f6dc5SNeil Armstrong }; 85c35f6dc5SNeil Armstrong 86c35f6dc5SNeil Armstrong cpu102: cpu@102 { 87c35f6dc5SNeil Armstrong device_type = "cpu"; 88c35f6dc5SNeil Armstrong compatible = "arm,cortex-a73"; 89c35f6dc5SNeil Armstrong reg = <0x0 0x102>; 90c35f6dc5SNeil Armstrong enable-method = "psci"; 916eeaf4d2SFrank Hartung capacity-dmips-mhz = <1024>; 92c35f6dc5SNeil Armstrong next-level-cache = <&l2>; 93195f1403SGuillaume La Roque #cooling-cells = <2>; 94c35f6dc5SNeil Armstrong }; 95c35f6dc5SNeil Armstrong 96c35f6dc5SNeil Armstrong cpu103: cpu@103 { 97c35f6dc5SNeil Armstrong device_type = "cpu"; 98c35f6dc5SNeil Armstrong compatible = "arm,cortex-a73"; 99c35f6dc5SNeil Armstrong reg = <0x0 0x103>; 100c35f6dc5SNeil Armstrong enable-method = "psci"; 1016eeaf4d2SFrank Hartung capacity-dmips-mhz = <1024>; 102c35f6dc5SNeil Armstrong next-level-cache = <&l2>; 103195f1403SGuillaume La Roque #cooling-cells = <2>; 104c35f6dc5SNeil Armstrong }; 1051499218cSNeil Armstrong 1061499218cSNeil Armstrong l2: l2-cache0 { 1071499218cSNeil Armstrong compatible = "cache"; 10849f65e2eSPierre Gondois cache-level = <2>; 109*c2258a94SKrzysztof Kozlowski cache-unified; 1101499218cSNeil Armstrong }; 111c35f6dc5SNeil Armstrong }; 112c35f6dc5SNeil Armstrong}; 113c35f6dc5SNeil Armstrong 114c35f6dc5SNeil Armstrong&clkc { 115c35f6dc5SNeil Armstrong compatible = "amlogic,g12b-clkc"; 116c35f6dc5SNeil Armstrong}; 1171499218cSNeil Armstrong 118fc9eab4bSNeil Armstrong&cpu_thermal { 119fc9eab4bSNeil Armstrong cooling-maps { 120fc9eab4bSNeil Armstrong map0 { 121fc9eab4bSNeil Armstrong trip = <&cpu_passive>; 122fc9eab4bSNeil Armstrong cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 123fc9eab4bSNeil Armstrong <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 124fc9eab4bSNeil Armstrong <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 125fc9eab4bSNeil Armstrong <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 126fc9eab4bSNeil Armstrong <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 127fc9eab4bSNeil Armstrong <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 128fc9eab4bSNeil Armstrong }; 129fc9eab4bSNeil Armstrong map1 { 130fc9eab4bSNeil Armstrong trip = <&cpu_hot>; 131fc9eab4bSNeil Armstrong cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 132fc9eab4bSNeil Armstrong <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 133fc9eab4bSNeil Armstrong <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 134fc9eab4bSNeil Armstrong <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 135fc9eab4bSNeil Armstrong <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136fc9eab4bSNeil Armstrong <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 137fc9eab4bSNeil Armstrong }; 138fc9eab4bSNeil Armstrong }; 139fc9eab4bSNeil Armstrong}; 14003544505SRobin Murphy 14103544505SRobin Murphy&mali { 14203544505SRobin Murphy dma-coherent; 14303544505SRobin Murphy}; 14490cf8e21SJiucheng Xu 14590cf8e21SJiucheng Xu&pmu { 14690cf8e21SJiucheng Xu compatible = "amlogic,g12b-ddr-pmu"; 14790cf8e21SJiucheng Xu}; 14818b542e5STomeu Vizoso 14918b542e5STomeu Vizoso&npu { 15018b542e5STomeu Vizoso power-domains = <&pwrc PWRC_G12A_NNA_ID>; 15118b542e5STomeu Vizoso}; 152