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/openbmc/linux/include/sound/
H A Dak4117.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #define AK4117_REG_CLOCK 0x01 /* clock control */
27 #define AK4117_REG_QSUB_ADDR 0x11 /* Q-subcode address + control */
28 #define AK4117_REG_QSUB_TRACK 0x12 /* Q-subcode track */
29 #define AK4117_REG_QSUB_INDEX 0x13 /* Q-subcode index */
30 #define AK4117_REG_QSUB_MINUTE 0x14 /* Q-subcode minute */
31 #define AK4117_REG_QSUB_SECOND 0x15 /* Q-subcode second */
32 #define AK4117_REG_QSUB_FRAME 0x16 /* Q-subcode frame */
33 #define AK4117_REG_QSUB_ZERO 0x17 /* Q-subcode zero */
34 #define AK4117_REG_QSUB_ABSMIN 0x18 /* Q-subcode absolute minute */
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H A Dak4113.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
50 /* Q-subcode address + control */
52 /* Q-subcode track */
54 /* Q-subcode index */
56 /* Q-subcode minute */
58 /* Q-subcode second */
60 /* Q-subcode frame */
62 /* Q-subcode zero */
64 /* Q-subcode absolute minute */
66 /* Q-subcode absolute second */
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H A Dak4114.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 #define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
34 #define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
35 #define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
36 #define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
37 #define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
38 #define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
39 #define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
40 #define AK4114_REG_QSUB_ABSMIN 0x1d /* Q-subcode absolute minute */
41 #define AK4114_REG_QSUB_ABSSEC 0x1e /* Q-subcode absolute second */
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/openbmc/linux/drivers/rtc/
H A Drtc-imxdi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
8 * This driver uses the 47-bit 32 kHz counter in the Freescale DryIce block
10 * Since the RTC framework performs API locking via rtc->ops_lock the
39 #define DCAMR 0x08 /* Clock Alarm MSB Reg */
40 #define DCALR 0x0c /* Clock Alarm LSB Reg */
41 #define DCAMR_UNSET 0xFFFFFFFF /* doomsday - 1 sec */
44 #define DCR_TDCHL (1 << 30) /* Tamper-detect configuration hard lock */
45 #define DCR_TDCSL (1 << 29) /* Tamper-detect configuration soft lock */
46 #define DCR_KSSL (1 << 27) /* Key-select soft lock */
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/openbmc/linux/drivers/net/can/rcar/
H A Drcar_can.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN device driver
22 /* Clock Select Register settings */
24 CLKR_CLKP1 = 0, /* Peripheral clock (clkp1) */
25 CLKR_CLKP2 = 1, /* Peripheral clock (clkp2) */
26 CLKR_CLKEXT = 3, /* Externally input clock */
33 * mailbox 60 - 63 - Rx FIFO mailboxes
34 * mailbox 56 - 59 - Tx FIFO mailboxes
35 * non-FIFO mailboxes are not used
37 #define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
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/openbmc/linux/Documentation/i2c/
H A Dgpio-fault-injection.rst12 'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
15 injection. They will be described now along with their intended use-cases.
21 -----
26 because the bus master under test will not be able to clock. It should detect
27 the condition of SCL being unresponsive and report an error to the upper
31 -----
36 master under test should detect this condition and trigger a bus recovery (see
48 there are I2C client devices which detect a stuck SDA on their side and release
50 device deglitching and monitoring the I2C bus. It could also detect a stuck SDA
56 --------------------------
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/openbmc/linux/Documentation/userspace-api/media/cec/
H A Dcec-ioc-receive.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
14 CEC_RECEIVE, CEC_TRANSMIT - Receive or transmit a CEC message
42 If the file descriptor is in non-blocking mode and there are no received
43 messages pending, then it will return -1 and set errno to the ``EAGAIN``
44 error code. If the file descriptor is in blocking mode and ``timeout``
45 is non-zero and no message arrived within ``timeout`` milliseconds, then
46 it will return -1 and set errno to the ``ETIMEDOUT`` error code.
51 be 0, ``tx_status`` will be 0 and ``rx_status`` will be non-zero).
52 2. the transmit result of an earlier non-blocking transmit (the ``sequence``
53 field will be non-zero, ``tx_status`` will be non-zero and ``rx_status``
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dti,elm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments Error Location Module (ELM).
10 - Roger Quadros <rogerq@kernel.org>
13 ELM module is used together with GPMC and NAND Flash to detect
14 errors and the location of the error based on BCH algorithms
20 - ti,am3352-elm
21 - ti,am64-elm
31 description: Functional clock.
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/openbmc/linux/sound/pci/echoaudio/
H A Ddarla24_dsp.c3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
37 return -ENODEV; in init_hw()
41 dev_err(chip->card->dev, in init_hw()
46 chip->device_id = device_id; in init_hw()
47 chip->subdevice_id = subdevice_id; in init_hw()
48 chip->bad_board = true; in init_hw()
49 chip->dsp_code_to_load = FW_DARLA24_DSP; in init_hw()
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/openbmc/linux/drivers/mmc/core/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
24 #include <linux/fault-inject.h>
33 #include <linux/mmc/slot-gpio.h>
50 /* The max erase timeout, used when host->max_busy_timeout isn't specified */
85 struct mmc_command *cmd = mrq->cmd; in mmc_should_fail_request()
86 struct mmc_data *data = mrq->data; in mmc_should_fail_request()
88 -ETIMEDOUT, in mmc_should_fail_request()
89 -EILSEQ, in mmc_should_fail_request()
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/openbmc/linux/drivers/clocksource/
H A Dtimer-ti-dm-systimer.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <linux/clk/clk-conf.h>
17 #include <clocksource/timer-ti-dm.h>
18 #include <dt-bindings/bus/ti-sysc.h>
20 /* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
68 u32 tidr = readl_relaxed(t->base); in dmtimer_systimer_revision1()
82 writel_relaxed(val, t->base + t->sysc); in dmtimer_systimer_enable()
90 writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc); in dmtimer_systimer_disable()
95 void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET; in dmtimer_systimer_type1_reset()
100 writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl); in dmtimer_systimer_type1_reset()
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/openbmc/linux/Documentation/devicetree/bindings/rng/
H A Dst,stm32-rng.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Lionel Debieve <lionel.debieve@foss.st.com>
18 const: st,stm32-rng
29 clock-error-detect:
31 description: If set enable the clock detection management
34 - compatible
35 - reg
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/openbmc/linux/sound/soc/intel/boards/
H A Dbytcr_rt5640.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * byt_cr_dpcm_rt5640.c - ASoc Machine driver for Intel Byt CR platform
30 #include <sound/soc-acpi.h>
31 #include <dt-bindings/sound/rt5640.h>
33 #include "../atom/sst-atom-controls.h"
34 #include "../common/soc-intel-quirks.h"
36 #define BYT_RT5640_FALLBACK_CODEC_DEV_NAME "i2c-rt5640"
77 #define BYT_RT5640_DIFF_MIC BIT(18) /* default is single-ended */
98 /* in-diff or dmic-pin + jdsrc + ovcd-th + -sf + jd-inv + terminating entry */
112 static int quirk_override = -1;
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/openbmc/linux/drivers/clk/
H A Dclkdev.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/clk-provider.h>
33 * Then we take the most specific entry - with the following
50 if (p->dev_id) { in clk_find()
51 if (!dev_id || strcmp(p->dev_id, dev_id)) in clk_find()
55 if (p->con_id) { in clk_find()
56 if (!con_id || strcmp(p->con_id, con_id)) in clk_find()
75 struct clk_hw *hw = ERR_PTR(-ENOENT); in clk_find_hw()
80 hw = cl->clk_hw; in clk_find_hw()
105 if (dev && dev->of_node) { in clk_get()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c2 * pxaregs - tool to display and modify PXA250's registers at runtime
4 * (c) Copyright 2002 by M&N Logistik-Lösungen Online GmbH
9 * Please send patches to h.schurig, working at mn-logistik.de
10 * - added fix from Bernhard Nemec
11 * - i2c registers from Stefan Eletzhofer
25 #include <linux/i2c-dev.h>
29 static int fd = -1;
57 { "ICR_SCLE", 0x40301690, 5, 1, 'x', " master clock enable " },
62 { "ICR_BEIE", 0x40301690, 10, 1, 'x', " enable bus error ints " },
80 { "ISR_BED", 0x40301698, 10, 1, 'x', " bus error no ACK/NAK " },
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/openbmc/u-boot/drivers/mmc/
H A Dsunxi_mmc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2011
18 #include <asm/arch/clock.h>
22 #include <asm-generic/gpio.h>
39 struct gpio_desc cd_gpio; /* Change Detect GPIO */
40 int cd_inverted; /* Inverted Card Detect */
60 return -EINVAL; in sunxi_mmc_getcd_gpio()
73 priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE; in mmc_resource_init()
74 priv->mclkreg = &ccm->sd0_clk_cfg; in mmc_resource_init()
77 priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE; in mmc_resource_init()
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/openbmc/qemu/hw/s390x/
H A Dtod-kvm.c2 * TOD (Time Of Day) clock - KVM implementation
8 * See the COPYING file in the top-level directory.
12 #include "qapi/error.h"
19 static void kvm_s390_get_tod_raw(S390TOD *tod, Error **errp) in kvm_s390_get_tod_raw()
23 r = kvm_s390_get_clock_ext(&tod->high, &tod->low); in kvm_s390_get_tod_raw()
24 if (r == -ENXIO) { in kvm_s390_get_tod_raw()
25 r = kvm_s390_get_clock(&tod->high, &tod->low); in kvm_s390_get_tod_raw()
28 error_setg(errp, "Unable to get KVM guest TOD clock: %s", in kvm_s390_get_tod_raw()
29 strerror(-r)); in kvm_s390_get_tod_raw()
33 static void kvm_s390_tod_get(const S390TODState *td, S390TOD *tod, Error **errp) in kvm_s390_tod_get()
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/openbmc/linux/arch/sh/drivers/pci/
H A Dpci-sh4.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include "pci-sh7780.h"
10 #include "pci-sh7751.h"
32 #define SH4_PCIINT_MLCK 0x00008000 /* Master Lock Error */
33 #define SH4_PCIINT_TABT 0x00004000 /* Target Abort Error */
34 #define SH4_PCIINT_TRET 0x00000200 /* Target Retry Error */
35 #define SH4_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */
36 #define SH4_PCIINT_PRTY 0x00000080 /* Address Parity Error */
37 #define SH4_PCIINT_SERR 0x00000040 /* SERR Detection Error */
38 #define SH4_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */
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/openbmc/linux/arch/arm/mach-pxa/
H A Dirqs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/irqs.h
20 #define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
23 #define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
25 #define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
26 #define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
27 #define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
28 #define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */
29 #define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
41 #define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
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/openbmc/linux/drivers/usb/renesas_usbhs/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-1.0+ */
100 #define D2FIFOSEL 0x00F0 /* for R-Car Gen2 */
101 #define D2FIFOCTR 0x00F2 /* for R-Car Gen2 */
102 #define D3FIFOSEL 0x00F4 /* for R-Car Gen2 */
103 #define D3FIFOCTR 0x00F6 /* for R-Car Gen2 */
107 #define SCKE (1 << 10) /* USB Module Clock Enable */
108 #define CNEN (1 << 8) /* Single-ended receiver operation Enable */
109 #define HSE (1 << 7) /* High-Speed Operation Enable */
111 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
114 #define UCKSEL (1 << 2) /* Clock Select for RZ/A1 */
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/openbmc/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
20 #define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
21 #define PA_PCICD (PA_BCR+0x0010) /* PCI Connector detect control */
49 #define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */
61 #define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
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/openbmc/linux/sound/firewire/digi00x/
H A Ddigi00x-stream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * digi00x-stream.c - a part of driver for Digidesign Digi 002/003 family
5 * Copyright (c) 2014-2015 Takashi Sakamoto
36 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST, in snd_dg00x_stream_get_local_rate()
46 err = -EIO; in snd_dg00x_stream_get_local_rate()
61 return -EINVAL; in snd_dg00x_stream_set_local_rate()
64 return snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST, in snd_dg00x_stream_set_local_rate()
70 enum snd_dg00x_clock *clock) in snd_dg00x_stream_get_clock() argument
75 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST, in snd_dg00x_stream_get_clock()
81 *clock = be32_to_cpu(reg) & 0x0f; in snd_dg00x_stream_get_clock()
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/openbmc/linux/sound/pci/hda/
H A Dpatch_cs8409.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 struct cs8409_spec *spec = codec->spec; in cs8409_parse_auto_config()
28 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); in cs8409_parse_auto_config()
32 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); in cs8409_parse_auto_config()
37 if (spec->gen.dyn_adc_switch) { in cs8409_parse_auto_config()
40 for (i = 0; i < spec->gen.input_mux.num_items; i++) { in cs8409_parse_auto_config()
41 int idx = spec->gen.dyn_adc_idx[i]; in cs8409_parse_auto_config()
45 snd_hda_gen_fix_pin_power(codec, spec->gen.adc_nids[idx]); in cs8409_parse_auto_config()
62 codec->spec = spec; in cs8409_alloc_spec()
63 spec->codec = codec; in cs8409_alloc_spec()
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/openbmc/linux/drivers/net/phy/
H A Ddp83640_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define PTP_TXTS 0x001c /* PTP Transmit Timestamp Register, in four 16-bit reads */
21 #define PTP_RXTS 0x001d /* PTP Receive Timestamp Register, in six? 16-bit reads */
40 #define PTP_COC 0x0014 /* PTP Clock Output Control Register */
47 #define PTP_CLKSRC 0x001b /* PTP Clock Source Register */
63 #define PTP_RD_CLK (1<<5) /* Read PTP Clock */
64 #define PTP_LOAD_CLK (1<<4) /* Load PTP Clock */
65 #define PTP_STEP_CLK (1<<3) /* Step PTP Clock */
66 #define PTP_ENABLE (1<<2) /* Enable PTP Clock */
67 #define PTP_DISABLE (1<<1) /* Disable PTP Clock */
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/openbmc/linux/drivers/net/ethernet/marvell/
H A Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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