xref: /openbmc/linux/sound/pci/echoaudio/darla24_dsp.c (revision 762f99f4f3cb41a775b5157dd761217beba65873)
1dd7b254dSGiuliano Pochini /***************************************************************************
2dd7b254dSGiuliano Pochini 
3dd7b254dSGiuliano Pochini    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4dd7b254dSGiuliano Pochini    All rights reserved
5dd7b254dSGiuliano Pochini    www.echoaudio.com
6dd7b254dSGiuliano Pochini 
7dd7b254dSGiuliano Pochini    This file is part of Echo Digital Audio's generic driver library.
8dd7b254dSGiuliano Pochini 
9dd7b254dSGiuliano Pochini    Echo Digital Audio's generic driver library is free software;
10dd7b254dSGiuliano Pochini    you can redistribute it and/or modify it under the terms of
11dd7b254dSGiuliano Pochini    the GNU General Public License as published by the Free Software
12dd7b254dSGiuliano Pochini    Foundation.
13dd7b254dSGiuliano Pochini 
14dd7b254dSGiuliano Pochini    This program is distributed in the hope that it will be useful,
15dd7b254dSGiuliano Pochini    but WITHOUT ANY WARRANTY; without even the implied warranty of
16dd7b254dSGiuliano Pochini    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17dd7b254dSGiuliano Pochini    GNU General Public License for more details.
18dd7b254dSGiuliano Pochini 
19dd7b254dSGiuliano Pochini    You should have received a copy of the GNU General Public License
20dd7b254dSGiuliano Pochini    along with this program; if not, write to the Free Software
21dd7b254dSGiuliano Pochini    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22dd7b254dSGiuliano Pochini    MA  02111-1307, USA.
23dd7b254dSGiuliano Pochini 
24dd7b254dSGiuliano Pochini    *************************************************************************
25dd7b254dSGiuliano Pochini 
26dd7b254dSGiuliano Pochini  Translation from C++ and adaptation for use in ALSA-Driver
27dd7b254dSGiuliano Pochini  were made by Giuliano Pochini <pochini@shiny.it>
28dd7b254dSGiuliano Pochini 
29dd7b254dSGiuliano Pochini ****************************************************************************/
30dd7b254dSGiuliano Pochini 
31dd7b254dSGiuliano Pochini 
init_hw(struct echoaudio * chip,u16 device_id,u16 subdevice_id)32dd7b254dSGiuliano Pochini static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
33dd7b254dSGiuliano Pochini {
34dd7b254dSGiuliano Pochini 	int err;
35dd7b254dSGiuliano Pochini 
36da3cec35STakashi Iwai 	if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
37da3cec35STakashi Iwai 		return -ENODEV;
38dd7b254dSGiuliano Pochini 
39*549717fcSTakashi Iwai 	err = init_dsp_comm_page(chip);
40*549717fcSTakashi Iwai 	if (err) {
41b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
42b5b4a41bSSudip Mukherjee 			"init_hw: could not initialize DSP comm page\n");
43dd7b254dSGiuliano Pochini 		return err;
44dd7b254dSGiuliano Pochini 	}
45dd7b254dSGiuliano Pochini 
46dd7b254dSGiuliano Pochini 	chip->device_id = device_id;
47dd7b254dSGiuliano Pochini 	chip->subdevice_id = subdevice_id;
483f6175ecSMark Brown 	chip->bad_board = true;
4919b50063SGiuliano Pochini 	chip->dsp_code_to_load = FW_DARLA24_DSP;
50dd7b254dSGiuliano Pochini 	/* Since this card has no ASIC, mark it as loaded so everything
51dd7b254dSGiuliano Pochini 	   works OK */
523f6175ecSMark Brown 	chip->asic_loaded = true;
53dd7b254dSGiuliano Pochini 	chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
54dd7b254dSGiuliano Pochini 		ECHO_CLOCK_BIT_ESYNC;
55dd7b254dSGiuliano Pochini 
56*549717fcSTakashi Iwai 	err = load_firmware(chip);
57*549717fcSTakashi Iwai 	if (err < 0)
58dd7b254dSGiuliano Pochini 		return err;
593f6175ecSMark Brown 	chip->bad_board = false;
60dd7b254dSGiuliano Pochini 
61dd7b254dSGiuliano Pochini 	return err;
62dd7b254dSGiuliano Pochini }
63dd7b254dSGiuliano Pochini 
64dd7b254dSGiuliano Pochini 
65dd7b254dSGiuliano Pochini 
set_mixer_defaults(struct echoaudio * chip)66ad3499f4SGiuliano Pochini static int set_mixer_defaults(struct echoaudio *chip)
67ad3499f4SGiuliano Pochini {
68ad3499f4SGiuliano Pochini 	return init_line_levels(chip);
69ad3499f4SGiuliano Pochini }
70ad3499f4SGiuliano Pochini 
71ad3499f4SGiuliano Pochini 
72ad3499f4SGiuliano Pochini 
detect_input_clocks(const struct echoaudio * chip)73dd7b254dSGiuliano Pochini static u32 detect_input_clocks(const struct echoaudio *chip)
74dd7b254dSGiuliano Pochini {
75dd7b254dSGiuliano Pochini 	u32 clocks_from_dsp, clock_bits;
76dd7b254dSGiuliano Pochini 
77dd7b254dSGiuliano Pochini 	/* Map the DSP clock detect bits to the generic driver clock
78dd7b254dSGiuliano Pochini 	   detect bits */
79dd7b254dSGiuliano Pochini 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
80dd7b254dSGiuliano Pochini 
81dd7b254dSGiuliano Pochini 	clock_bits = ECHO_CLOCK_BIT_INTERNAL;
82dd7b254dSGiuliano Pochini 
83dd7b254dSGiuliano Pochini 	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
84dd7b254dSGiuliano Pochini 		clock_bits |= ECHO_CLOCK_BIT_ESYNC;
85dd7b254dSGiuliano Pochini 
86dd7b254dSGiuliano Pochini 	return clock_bits;
87dd7b254dSGiuliano Pochini }
88dd7b254dSGiuliano Pochini 
89dd7b254dSGiuliano Pochini 
90dd7b254dSGiuliano Pochini 
91dd7b254dSGiuliano Pochini /* The Darla24 has no ASIC. Just do nothing */
load_asic(struct echoaudio * chip)92dd7b254dSGiuliano Pochini static int load_asic(struct echoaudio *chip)
93dd7b254dSGiuliano Pochini {
94dd7b254dSGiuliano Pochini 	return 0;
95dd7b254dSGiuliano Pochini }
96dd7b254dSGiuliano Pochini 
97dd7b254dSGiuliano Pochini 
98dd7b254dSGiuliano Pochini 
set_sample_rate(struct echoaudio * chip,u32 rate)99dd7b254dSGiuliano Pochini static int set_sample_rate(struct echoaudio *chip, u32 rate)
100dd7b254dSGiuliano Pochini {
101dd7b254dSGiuliano Pochini 	u8 clock;
102dd7b254dSGiuliano Pochini 
103dd7b254dSGiuliano Pochini 	switch (rate) {
104dd7b254dSGiuliano Pochini 	case 96000:
105dd7b254dSGiuliano Pochini 		clock = GD24_96000;
106dd7b254dSGiuliano Pochini 		break;
107dd7b254dSGiuliano Pochini 	case 88200:
108dd7b254dSGiuliano Pochini 		clock = GD24_88200;
109dd7b254dSGiuliano Pochini 		break;
110dd7b254dSGiuliano Pochini 	case 48000:
111dd7b254dSGiuliano Pochini 		clock = GD24_48000;
112dd7b254dSGiuliano Pochini 		break;
113dd7b254dSGiuliano Pochini 	case 44100:
114dd7b254dSGiuliano Pochini 		clock = GD24_44100;
115dd7b254dSGiuliano Pochini 		break;
116dd7b254dSGiuliano Pochini 	case 32000:
117dd7b254dSGiuliano Pochini 		clock = GD24_32000;
118dd7b254dSGiuliano Pochini 		break;
119dd7b254dSGiuliano Pochini 	case 22050:
120dd7b254dSGiuliano Pochini 		clock = GD24_22050;
121dd7b254dSGiuliano Pochini 		break;
122dd7b254dSGiuliano Pochini 	case 16000:
123dd7b254dSGiuliano Pochini 		clock = GD24_16000;
124dd7b254dSGiuliano Pochini 		break;
125dd7b254dSGiuliano Pochini 	case 11025:
126dd7b254dSGiuliano Pochini 		clock = GD24_11025;
127dd7b254dSGiuliano Pochini 		break;
128dd7b254dSGiuliano Pochini 	case 8000:
129dd7b254dSGiuliano Pochini 		clock = GD24_8000;
130dd7b254dSGiuliano Pochini 		break;
131dd7b254dSGiuliano Pochini 	default:
132b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
133b5b4a41bSSudip Mukherjee 			"set_sample_rate: Error, invalid sample rate %d\n",
134b5b4a41bSSudip Mukherjee 			rate);
135dd7b254dSGiuliano Pochini 		return -EINVAL;
136dd7b254dSGiuliano Pochini 	}
137dd7b254dSGiuliano Pochini 
138dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
139dd7b254dSGiuliano Pochini 		return -EIO;
140dd7b254dSGiuliano Pochini 
141b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev,
142b5b4a41bSSudip Mukherjee 		"set_sample_rate: %d clock %d\n", rate, clock);
143dd7b254dSGiuliano Pochini 	chip->sample_rate = rate;
144dd7b254dSGiuliano Pochini 
145dd7b254dSGiuliano Pochini 	/* Override the sample rate if this card is set to Echo sync. */
146dd7b254dSGiuliano Pochini 	if (chip->input_clock == ECHO_CLOCK_ESYNC)
147dd7b254dSGiuliano Pochini 		clock = GD24_EXT_SYNC;
148dd7b254dSGiuliano Pochini 
149dd7b254dSGiuliano Pochini 	chip->comm_page->sample_rate = cpu_to_le32(rate);	/* ignored by the DSP ? */
150dd7b254dSGiuliano Pochini 	chip->comm_page->gd_clock_state = clock;
151dd7b254dSGiuliano Pochini 	clear_handshake(chip);
152dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
153dd7b254dSGiuliano Pochini }
154dd7b254dSGiuliano Pochini 
155dd7b254dSGiuliano Pochini 
156dd7b254dSGiuliano Pochini 
set_input_clock(struct echoaudio * chip,u16 clock)157dd7b254dSGiuliano Pochini static int set_input_clock(struct echoaudio *chip, u16 clock)
158dd7b254dSGiuliano Pochini {
159da3cec35STakashi Iwai 	if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
160da3cec35STakashi Iwai 		       clock != ECHO_CLOCK_ESYNC))
161da3cec35STakashi Iwai 		return -EINVAL;
162dd7b254dSGiuliano Pochini 	chip->input_clock = clock;
163dd7b254dSGiuliano Pochini 	return set_sample_rate(chip, chip->sample_rate);
164dd7b254dSGiuliano Pochini }
165dd7b254dSGiuliano Pochini 
166