| /openbmc/linux/drivers/net/ethernet/intel/e1000e/ |
| H A D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
25 pci_read_config_word(adapter->pdev, in e1000e_get_bus_info_pcie()
28 bus->width = (enum e1000_bus_width)((pcie_link_status & in e1000e_get_bus_info_pcie()
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| H A D | phy.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
37 * e1000e_check_reset_block_generic - Check if PHY reset is blocked
40 * Read the PHY management control register and check whether a PHY reset
54 * e1000e_get_phy_id - Retrieve the PHY ID and revision
62 struct e1000_phy_info *phy = &hw->phy; in e1000e_get_phy_id()
67 if (!phy->ops.read_reg) in e1000e_get_phy_id()
75 phy->id = (u32)(phy_id << 16); in e1000e_get_phy_id()
81 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in e1000e_get_phy_id()
82 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in e1000e_get_phy_id()
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| /openbmc/linux/drivers/net/ethernet/intel/igc/ |
| H A D | igc_mac.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * igc_disable_pcie_master - Disables PCI-express master access
14 * Returns 0 (0) if successful, else returns -10
15 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
18 * Disables PCI-Express master access and verifies there are no pending
36 timeout--; in igc_disable_pcie_master()
41 ret_val = -IGC_ERR_MASTER_REQUESTS_PENDING; in igc_disable_pcie_master()
50 * igc_init_rx_addrs - Initialize receive addresses
66 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in igc_init_rx_addrs()
68 /* Zero out the other (rar_entry_count - 1) receive addresses */ in igc_init_rx_addrs()
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| H A D | igc_phy.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
11 * Read the PHY management control register and check whether a PHY reset
26 * igc_get_phy_id - Retrieve the PHY ID and revision
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
44 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
48 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
49 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
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| /openbmc/linux/drivers/net/ethernet/intel/igb/ |
| H A D | e1000_mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
18 * igb_get_bus_info_pcie - Get PCIe bus information
27 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
32 bus->type = e1000_bus_type_pci_express; in igb_get_bus_info_pcie()
38 bus->width = e1000_bus_width_unknown; in igb_get_bus_info_pcie()
39 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
43 bus->speed = e1000_bus_speed_2500; in igb_get_bus_info_pcie()
46 bus->speed = e1000_bus_speed_5000; in igb_get_bus_info_pcie()
49 bus->speed = e1000_bus_speed_unknown; in igb_get_bus_info_pcie()
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| H A D | e1000_phy.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
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| H A D | e1000_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | milbeaut-uart.txt | 4 - compatible: should be "socionext,milbeaut-usio-uart".
5 - reg: offset and length of the register set for the device.
6 - interrupts: two interrupts specifier.
7 - interrupt-names: should be "rx", "tx".
8 - clocks: phandle to the input clock.
11 - auto-flow-control: flow control enable.
15 compatible = "socionext,milbeaut-usio-uart";
18 interrupt-names = "rx", "tx";
20 auto-flow-control;
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| H A D | socionext,uniphier-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 const: socionext,uniphier-uart
28 auto-flow-control:
29 description: enable automatic flow control support.
33 - compatible
34 - reg
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| /openbmc/linux/drivers/net/ethernet/intel/e1000/ |
| H A D | e1000_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
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| H A D | e1000_param.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
12 #define OPTION_UNSET -1
30 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
31 * Valid Range: 80-4096 for 82544 and newer
39 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
40 * Valid Range: 80-4096 for 82544 and newer
49 * - 0 - auto-negotiate at all supported speeds
50 * - 10 - only link at 10 Mbps
51 * - 100 - only link at 100 Mbps
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/ |
| H A D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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| H A D | ice.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
54 1) Make sure that your system's physical memory is in a high-performance
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| H A D | ixgbe.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Additional Configurations
16 - Known Issues
17 - Support
36 ----------------------------------
38 82599-BASED ADAPTERS
41 - If your 82599-based Intel(R) Network Adapter came with Intel optics or is an
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| /openbmc/linux/drivers/tty/serial/jsm/ |
| H A D | jsm_neo.c | 1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
43 /* Turn on auto CTS flow control */ in neo_set_cts_flow_control()
47 /* Turn off auto Xon flow control */ in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
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| /openbmc/linux/drivers/net/ethernet/oki-semi/pch_gbe/ |
| H A D | pch_gbe_param.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define OPTION_UNSET -1
17 * TxDescriptors - Transmit Descriptor Count
18 * @Valid Range: PCH_GBE_MIN_TXD - PCH_GBE_MAX_TXD
26 * RxDescriptors -Receive Descriptor Count
27 * @Valid Range: PCH_GBE_MIN_RXD - PCH_GBE_MAX_RXD
35 * Speed - User Specified Speed Override
37 * - 0: auto-negotiate at all supported speeds
38 * - 10: only link at 10 Mbps
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| /openbmc/u-boot/drivers/net/ |
| H A D | e1000.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 Intel Pro 1000 for ppcboot/das-u-boot
4 Drivers are port from Intel's Linux driver e1000-4.3.15
11 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
16 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
60 * Normally U-Boot does not support this anyway. To fix it in this driver,
160 * hw - Struct containing variables accessed by shared code
161 * eecd - EECD's current value
177 * hw - Struct containing variables accessed by shared code
178 * eecd - EECD's current value
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| H A D | e1000.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
5 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
10 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36 printf("e1000: %s: ERROR: " fmt, (NIC)->name ,##args)
40 printf("e1000: %s: DEBUG: " fmt, (NIC)->name ,##args)
51 writel((value), ((a)->hw_addr + E1000_##reg))
53 readl((a)->hw_addr + E1000_##reg)
55 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))
57 readl((a)->hw_addr + E1000_##reg + ((offset) << 2))
134 /* Flow Control Settings */
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| /openbmc/linux/drivers/net/usb/ |
| H A D | smsc95xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
82 #define HW_CFG_ETC_ (0x00000010) /* EEPROM Timeout Control */
96 /* Power Management Control Register */
124 /* Automatic Flow Control Configuration Register */
126 #define AFC_CFG_HI_ (0x00FF0000) /* Auto Flow Ctrl High Level */
127 #define AFC_CFG_LO_ (0x0000FF00) /* Auto Flow Ctrl Low Level */
129 #define AFC_CFG_FC_MULT_ (0x00000008) /* Flow Ctrl on Mcast Frame */
130 #define AFC_CFG_FC_BRD_ (0x00000004) /* Flow Ctrl on Bcast Frame */
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| /openbmc/u-boot/include/linux/ |
| H A D | serial_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
45 #define UART_FCR 2 /* Out: FIFO Control Register */
89 #define UART_LCR 3 /* Out: Line Control Register */
95 #define UART_LCR_SBC 0x40 /* Set break control */
112 #define UART_MCR 4 /* Out: Modem Control Register */
116 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
126 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
158 #define UART_EFR_CTS 0x80 /* CTS flow control */
159 #define UART_EFR_RTS 0x40 /* RTS flow control */
161 #define UART_EFR_ECB 0x10 /* Enhanced control bit */
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| H A D | mii.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
13 #define MII_BMCR 0x00 /* Basic mode control register */
17 #define MII_ADVERTISE 0x04 /* Advertisement control reg */
20 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
21 #define MII_STAT1000 0x0a /* 1000BASE-T status */
22 #define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
27 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
37 /* Basic mode control register. */
42 #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
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| /openbmc/linux/include/net/phonet/ |
| H A D | pep.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
19 /* XXX: union-ify listening vs connected stuff ? */
33 u8 rx_fc; /* RX flow control */
34 u8 tx_fc; /* TX flow control */
35 u8 init_enable; /* auto-enable at creation */
130 /* Phonet pipe sub-block types */
141 /* Phonet pipe flow control models */
152 /* Phonet pipe flow control states */
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| /openbmc/linux/include/uapi/linux/ |
| H A D | serial_reg.h | 1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
53 #define UART_FCR 2 /* Out: FIFO Control Register */
104 #define UART_LCR 3 /* Out: Line Control Register */
110 #define UART_LCR_SBC 0x40 /* Set break control */
127 #define UART_MCR 4 /* Out: Modem Control Register */
131 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
141 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
174 #define UART_EFR_CTS 0x80 /* CTS flow control */
175 #define UART_EFR_RTS 0x40 /* RTS flow control */
177 #define UART_EFR_ECB 0x10 /* Enhanced control bit */
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| /openbmc/u-boot/doc/device-tree-bindings/serial/ |
| H A D | 8250.txt | 4 - compatible : one of:
5 - "ns8250"
6 - "ns16450"
7 - "ns16550a"
8 - "ns16550"
9 - "ns16750"
10 - "ns16850"
11 - For Tegra20, must contain "nvidia,tegra20-uart"
12 - For other Tegra, must contain '"nvidia,<chip>-uart",
13 "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
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| /openbmc/linux/Documentation/networking/ |
| H A D | nf_conntrack-sysctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 nf_conntrack_acct - BOOLEAN
11 - 0 - disabled (default)
12 - not 0 - enabled
14 Enable connection tracking flow accounting. 64-bit byte and packet
15 counters per flow are added.
17 nf_conntrack_buckets - INTEGER
24 nf_conntrack_checksum - BOOLEAN
25 - 0 - disabled
26 - not 0 - enabled (default)
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