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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sm6115-pas.yaml4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml#
7 title: Qualcomm SM6115 Peripheral Authentication Service
13 Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots
20 - qcom,sm6115-adsp-pas
21 - qcom,sm6115-cdsp-pas
22 - qcom,sm6115-mpss-pas
26 - const: qcom,sm6115-adsp-pas
30 - const: qcom,sm6115-mpss-pas
65 - qcom,sm6115-adsp-pas
66 - qcom,sm6115-cdsp-pas
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm6115-dispcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#
7 title: Qualcomm Display Clock Controller for SM6115
14 on SM6115.
16 See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h
21 - qcom,sm6115-dispcc
56 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
58 compatible = "qcom,sm6115-dispcc";
H A Dqcom,sm6115-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
40 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
48 compatible = "qcom,sm6115-gpucc";
H A Dqcom,gcc-sm6115.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h
20 const: qcom,gcc-sm6115
46 compatible = "qcom,gcc-sm6115";
H A Dqcom,rpmcc.yaml46 - qcom,rpmcc-sm6115
123 - qcom,rpmcc-sm6115
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
7 title: Qualcomm SM6115 Display MDSS
15 are mentioned for SM6115 target.
21 const: qcom,sm6115-mdss
37 const: qcom,sm6115-dpu
45 - const: qcom,sm6115-dsi-ctrl
64 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
65 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
73 compatible = "qcom,sm6115-mdss";
90 compatible = "qcom,sm6115-dpu";
[all …]
H A Dqcom,sm6115-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
7 title: Qualcomm Display DPU on SM6115
16 const: qcom,sm6115-dpu
57 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
58 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
62 compatible = "qcom,sm6115-dpu";
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
47 - $ref: "#/$defs/qcom-sm6115-lpass-state"
50 $ref: "#/$defs/qcom-sm6115-lpass-state"
54 qcom-sm6115-lpass-state:
126 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
H A Dqcom,sm6115-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115
18 const: qcom,sm6115-tlmm
43 - $ref: "#/$defs/qcom-sm6115-tlmm-state"
46 $ref: "#/$defs/qcom-sm6115-tlmm-state"
50 qcom-sm6115-tlmm-state:
106 compatible = "qcom,sm6115-tlmm";
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115p-lenovo-j606f.dts8 #include "sm6115.dtsi"
13 compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
72 firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
133 firmware-name = "qcom/sm6115/LENOVO/J606F/adsp.mbn";
138 firmware-name = "qcom/sm6115/LENOVO/J606F/cdsp.mbn";
143 firmware-name = "qcom/sm6115/LENOVO/J606F/modem.mbn";
H A Dsm6115.dtsi6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
265 compatible = "qcom,scm-sm6115", "qcom,scm";
345 compatible = "qcom,sm6115-rpm-proc", "qcom,rpm-proc";
355 compatible = "qcom,rpm-sm6115";
359 compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc";
366 compatible = "qcom,sm6115-rpmpd";
595 compatible = "qcom,sm6115-tcsr", "syscon";
600 compatible = "qcom,sm6115-tlmm";
[all …]
H A Dsm4250.dtsi6 #include "sm6115.dtsi"
H A Dsm6115-fxtec-pro1x.dts8 #include "sm6115.dtsi"
14 compatible = "fxtec,pro1x", "qcom,sm6115";
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm6115-lpass-lpi.c159 { .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
166 .name = "qcom-sm6115-lpass-lpi-pinctrl",
174 MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
H A DKconfig72 tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
78 (Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform.
H A DMakefile46 obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
47 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb3-uni-phy.yaml23 - qcom,sm6115-qmp-usb3-phy
93 - qcom,sm6115-qmp-usb3-phy
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml25 - qcom,sm6115-qmp-ufs-phy
104 - qcom,sm6115-qmp-ufs-phy
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dqcom-qce.yaml41 - qcom,sm6115-qce
120 - qcom,sm6115-qce
/openbmc/linux/drivers/clk/qcom/
H A DMakefile105 obj-$(CONFIG_SM_DISPCC_6115) += dispcc-sm6115.o
112 obj-$(CONFIG_SM_GCC_6115) += gcc-sm6115.o
122 obj-$(CONFIG_SM_GPUCC_6115) += gpucc-sm6115.o
H A Dgpucc-sm6115.c13 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
468 { .compatible = "qcom,sm6115-gpucc" },
497 .name = "sm6115-gpucc",
503 MODULE_DESCRIPTION("QTI GPU_CC SM6115 Driver");
H A Ddispcc-sm6115.c15 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
570 { .compatible = "qcom,sm6115-dispcc" },
601 .name = "dispcc-sm6115",
607 MODULE_DESCRIPTION("Qualcomm SM6115 Display Clock controller");
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml51 - qcom,sm6115-apcs-hmss-global
146 - qcom,sm6115-apcs-hmss-global
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml38 - qcom,sm6115-dwc3
310 - qcom,sm6115-dwc3
399 - qcom,sm6115-dwc3
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml50 - qcom,sm6115-smmu-500
73 - qcom,sm6115-smmu-500
87 - qcom,sm6115-smmu-500
435 - qcom,sm6115-smmu-500

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