1dce25b3eSIskren Chernev# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2dce25b3eSIskren Chernev%YAML 1.2 3dce25b3eSIskren Chernev--- 4dce25b3eSIskren Chernev$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml# 5dce25b3eSIskren Chernev$schema: http://devicetree.org/meta-schemas/core.yaml# 6dce25b3eSIskren Chernev 7*ece3c319SKrzysztof Kozlowskititle: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250 8dce25b3eSIskren Chernev 9dce25b3eSIskren Chernevmaintainers: 10dce25b3eSIskren Chernev - Iskren Chernev <iskren.chernev@gmail.com> 11dce25b3eSIskren Chernev 12dce25b3eSIskren Chernevdescription: | 13*ece3c319SKrzysztof Kozlowski Qualcomm global clock control module provides the clocks, resets and power 14*ece3c319SKrzysztof Kozlowski domains on SM4250/6115. 15dce25b3eSIskren Chernev 16*ece3c319SKrzysztof Kozlowski See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h 17dce25b3eSIskren Chernev 18dce25b3eSIskren Chernevproperties: 19dce25b3eSIskren Chernev compatible: 20dce25b3eSIskren Chernev const: qcom,gcc-sm6115 21dce25b3eSIskren Chernev 22dce25b3eSIskren Chernev clocks: 23dce25b3eSIskren Chernev items: 24dce25b3eSIskren Chernev - description: Board XO source 25dce25b3eSIskren Chernev - description: Sleep clock source 26dce25b3eSIskren Chernev 27dce25b3eSIskren Chernev clock-names: 28dce25b3eSIskren Chernev items: 29dce25b3eSIskren Chernev - const: bi_tcxo 30dce25b3eSIskren Chernev - const: sleep_clk 31dce25b3eSIskren Chernev 32dce25b3eSIskren Chernevrequired: 33dce25b3eSIskren Chernev - compatible 34dce25b3eSIskren Chernev - clocks 35dce25b3eSIskren Chernev - clock-names 36dce25b3eSIskren Chernev 370f71ae94SDmitry BaryshkovallOf: 380f71ae94SDmitry Baryshkov - $ref: qcom,gcc.yaml# 390f71ae94SDmitry Baryshkov 400f71ae94SDmitry BaryshkovunevaluatedProperties: false 41dce25b3eSIskren Chernev 42dce25b3eSIskren Chernevexamples: 43dce25b3eSIskren Chernev - | 44dce25b3eSIskren Chernev #include <dt-bindings/clock/qcom,rpmcc.h> 45dce25b3eSIskren Chernev clock-controller@1400000 { 46dce25b3eSIskren Chernev compatible = "qcom,gcc-sm6115"; 47dce25b3eSIskren Chernev reg = <0x01400000 0x1f0000>; 48dce25b3eSIskren Chernev #clock-cells = <1>; 49dce25b3eSIskren Chernev #reset-cells = <1>; 50dce25b3eSIskren Chernev #power-domain-cells = <1>; 51dce25b3eSIskren Chernev clock-names = "bi_tcxo", "sleep_clk"; 52dce25b3eSIskren Chernev clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; 53dce25b3eSIskren Chernev }; 54dce25b3eSIskren Chernev... 55