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/openbmc/u-boot/drivers/qe/
H A DKconfig2 # QUICC Engine Drivers
5 bool "Enable support for U QUICC Engine"
12 Choose this option to add support for U QUICC Engine.
/openbmc/u-boot/drivers/sysreset/
H A Dsysreset_mpc83xx.h47 "QUICC Engine 00",
48 "QUICC Engine 01",
49 "QUICC Engine 10",
50 "QUICC Engine 11",
/openbmc/linux/drivers/soc/fsl/qe/
H A DKconfig7 bool "QUICC Engine (QE) framework support"
13 The QUICC Engine (QE) is a new generation of communications
53 Freescale CPM QUICC Multichannel Controller
H A Dgpio.c3 * QUICC Engine GPIOs
/openbmc/linux/drivers/net/wan/
H A DKconfig130 Allows you to rebuild firmware run by the QUICC processor.
199 tristate "Freescale QUICC Engine HDLC support"
203 Driver for Freescale QUICC Engine HDLC controller. The driver
H A Dfsl_ucc_hdlc.h2 /* Freescale QUICC Engine HDLC Device Driver
/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME22 up to 1600 MHz, integrated security engine and QUICC Engine, and ECC
71 - QUICC Engine ULite block
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-scc-qmc.yaml7 title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
13 The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
H A Dqe.txt1 * Freescale QUICC Engine module (QE)
19 - bus-frequency : the clock frequency for QUICC Engine.
/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME22 up to 1600 MHz, integrated security engine and QUICC Engine, and ECC
71 - QUICC Engine ULite block
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dcpu_init.c374 "QUICC Engine 00", in print_83xx_arb_event()
375 "QUICC Engine 01", in print_83xx_arb_event()
376 "QUICC Engine 10", in print_83xx_arb_event()
377 "QUICC Engine 11", in print_83xx_arb_event()
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Dusb.txt1 Freescale QUICC Engine USB Controller
/openbmc/u-boot/board/freescale/t102xrdb/
H A DREADME56 - QUICC Engine block
63 T1023 is a reduced personality of T1024 without QUICC Engine, DIU, and
67 QUICC Engine: yes no
/openbmc/linux/arch/m68k/include/asm/
H A Dquicc_simple.h14 /* #include "quicc.h" */
/openbmc/linux/drivers/net/ethernet/freescale/
H A DKconfig87 This driver supports the Gigabit Ethernet mode of the QUICC Engine,
/openbmc/u-boot/board/freescale/t102xqds/
H A DREADME56 - QUICC Engine block
63 T1023 is a reduced personality of T1024 without QUICC Engine, DIU, and
67 QUICC Engine: yes no
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dls102xa_devdis.h21 { "qe", 0x0, 0x1 }, /* QUICC Engine */
/openbmc/linux/drivers/usb/host/
H A Dfhci-dbg.c3 * Freescale QUICC Engine USB Host Controller Driver
H A Dfhci-mem.c3 * Freescale QUICC Engine USB Host Controller Driver
H A Dfhci-q.c3 * Freescale QUICC Engine USB Host Controller Driver
H A Dfhci-hub.c3 * Freescale QUICC Engine USB Host Controller Driver
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,qmc-audio.yaml13 The QMC audio is an ASoC component which uses QMC (QUICC Multichannel
/openbmc/linux/drivers/tty/serial/
H A Ducc_uart.c3 * Freescale QUICC Engine UART device driver
9 * This driver adds support for UART devices via Freescale's QUICC Engine
1502 printk(KERN_INFO "Freescale QUICC Engine UART device driver\n"); in ucc_uart_init()
1526 "Freescale QUICC Engine UART device driver unloading\n"); in ucc_uart_exit()
1535 MODULE_DESCRIPTION("Freescale QUICC Engine (QE) UART");
/openbmc/linux/sound/soc/fsl/
H A DKconfig179 ALSA SoC Audio support using the Freescale QUICC Multichannel
/openbmc/linux/include/soc/fsl/qe/
H A Dqe.h9 * QUICC Engine (QE) external definitions and structure.
219 * take steps to shut down the eTSEC, QUICC Engine Block, and PCI in qe_alive_during_sleep()

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