10883c2c0SZhao Qiang* Freescale QUICC Engine module (QE) 20883c2c0SZhao QiangThis represents qe module that is installed on PowerQUICC II Pro. 30883c2c0SZhao Qiang 40883c2c0SZhao QiangNOTE: This is an interim binding; it should be updated to fit 50883c2c0SZhao Qiangin with the CPM binding later in this document. 60883c2c0SZhao Qiang 70883c2c0SZhao QiangBasically, it is a bus of devices, that could act more or less 80883c2c0SZhao Qiangas a complete entity (UCC, USB etc ). All of them should be siblings on 90883c2c0SZhao Qiangthe "root" qe node, using the common properties from there. 100883c2c0SZhao QiangThe description below applies to the qe of MPC8360 and 110883c2c0SZhao Qiangmore nodes and properties would be extended in the future. 120883c2c0SZhao Qiang 130883c2c0SZhao Qiangi) Root QE device 140883c2c0SZhao Qiang 150883c2c0SZhao QiangRequired properties: 160883c2c0SZhao Qiang- compatible : should be "fsl,qe"; 170883c2c0SZhao Qiang- model : precise model of the QE, Can be "QE", "CPM", or "CPM2" 180883c2c0SZhao Qiang- reg : offset and length of the device registers. 190883c2c0SZhao Qiang- bus-frequency : the clock frequency for QUICC Engine. 200883c2c0SZhao Qiang- fsl,qe-num-riscs: define how many RISC engines the QE has. 21*8f762fe5SRasmus Villemoes- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, 22*8f762fe5SRasmus Villemoes defining the array of serial number (SNUM) values for the virtual 230883c2c0SZhao Qiang threads. 240883c2c0SZhao Qiang 250883c2c0SZhao QiangOptional properties: 260883c2c0SZhao Qiang- fsl,firmware-phandle: 270883c2c0SZhao Qiang Usage: required only if there is no fsl,qe-firmware child node 280883c2c0SZhao Qiang Value type: <phandle> 290883c2c0SZhao Qiang Definition: Points to a firmware node (see "QE Firmware Node" below) 300883c2c0SZhao Qiang that contains the firmware that should be uploaded for this QE. 310883c2c0SZhao Qiang The compatible property for the firmware node should say, 320883c2c0SZhao Qiang "fsl,qe-firmware". 330883c2c0SZhao Qiang 340883c2c0SZhao QiangRecommended properties 350883c2c0SZhao Qiang- brg-frequency : the internal clock source frequency for baud-rate 360883c2c0SZhao Qiang generators in Hz. 370883c2c0SZhao Qiang 38*8f762fe5SRasmus VillemoesDeprecated properties 39*8f762fe5SRasmus Villemoes- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use 40*8f762fe5SRasmus Villemoes for the threads. Use fsl,qe-snums instead to not only specify the 41*8f762fe5SRasmus Villemoes number of snums, but also their values. 42*8f762fe5SRasmus Villemoes 430883c2c0SZhao QiangExample: 440883c2c0SZhao Qiang qe@e0100000 { 450883c2c0SZhao Qiang #address-cells = <1>; 460883c2c0SZhao Qiang #size-cells = <1>; 470883c2c0SZhao Qiang #interrupt-cells = <2>; 480883c2c0SZhao Qiang compatible = "fsl,qe"; 490883c2c0SZhao Qiang ranges = <0 e0100000 00100000>; 500883c2c0SZhao Qiang reg = <e0100000 480>; 510883c2c0SZhao Qiang brg-frequency = <0>; 520883c2c0SZhao Qiang bus-frequency = <179A7B00>; 53*8f762fe5SRasmus Villemoes fsl,qe-snums = /bits/ 8 < 54*8f762fe5SRasmus Villemoes 0x04 0x05 0x0C 0x0D 0x14 0x15 0x1C 0x1D 55*8f762fe5SRasmus Villemoes 0x24 0x25 0x2C 0x2D 0x34 0x35 0x88 0x89 56*8f762fe5SRasmus Villemoes 0x98 0x99 0xA8 0xA9 0xB8 0xB9 0xC8 0xC9 57*8f762fe5SRasmus Villemoes 0xD8 0xD9 0xE8 0xE9>; 580883c2c0SZhao Qiang } 590883c2c0SZhao Qiang 600883c2c0SZhao Qiang* Multi-User RAM (MURAM) 610883c2c0SZhao Qiang 620883c2c0SZhao QiangRequired properties: 630883c2c0SZhao Qiang- compatible : should be "fsl,qe-muram", "fsl,cpm-muram". 640883c2c0SZhao Qiang- mode : the could be "host" or "slave". 650883c2c0SZhao Qiang- ranges : Should be defined as specified in 1) to describe the 660883c2c0SZhao Qiang translation of MURAM addresses. 670883c2c0SZhao Qiang- data-only : sub-node which defines the address area under MURAM 680883c2c0SZhao Qiang bus that can be allocated as data/parameter 690883c2c0SZhao Qiang 700883c2c0SZhao QiangExample: 710883c2c0SZhao Qiang 720883c2c0SZhao Qiang muram@10000 { 730883c2c0SZhao Qiang compatible = "fsl,qe-muram", "fsl,cpm-muram"; 740883c2c0SZhao Qiang ranges = <0 00010000 0000c000>; 750883c2c0SZhao Qiang 760883c2c0SZhao Qiang data-only@0{ 770883c2c0SZhao Qiang compatible = "fsl,qe-muram-data", 780883c2c0SZhao Qiang "fsl,cpm-muram-data"; 790883c2c0SZhao Qiang reg = <0 c000>; 800883c2c0SZhao Qiang }; 810883c2c0SZhao Qiang }; 820883c2c0SZhao Qiang 830883c2c0SZhao Qiang* Interrupt Controller (IC) 840883c2c0SZhao Qiang 850883c2c0SZhao QiangRequired properties: 860883c2c0SZhao Qiang- compatible : should be "fsl,qe-ic". 870883c2c0SZhao Qiang- reg : Address range of IC register set. 880883c2c0SZhao Qiang- interrupts : interrupts generated by the device. 890883c2c0SZhao Qiang- interrupt-controller : this device is a interrupt controller. 900883c2c0SZhao Qiang 910883c2c0SZhao QiangExample: 920883c2c0SZhao Qiang 930883c2c0SZhao Qiang qeic: interrupt-controller@80 { 940883c2c0SZhao Qiang interrupt-controller; 950883c2c0SZhao Qiang compatible = "fsl,qe-ic"; 960883c2c0SZhao Qiang #address-cells = <0>; 970883c2c0SZhao Qiang #interrupt-cells = <1>; 980883c2c0SZhao Qiang reg = <0x80 0x80>; 990883c2c0SZhao Qiang interrupts = <95 2 0 0 94 2 0 0>; 1000883c2c0SZhao Qiang }; 1010883c2c0SZhao Qiang 1020883c2c0SZhao Qiang* Serial Interface Block (SI) 1030883c2c0SZhao Qiang 1040883c2c0SZhao QiangThe SI manages the routing of eight TDM lines to the QE block serial drivers 1050883c2c0SZhao Qiang, the MCC and the UCCs, for receive and transmit. 1060883c2c0SZhao Qiang 1070883c2c0SZhao QiangRequired properties: 1080883c2c0SZhao Qiang- compatible : must be "fsl,<chip>-qe-si". For t1040, must contain 1090883c2c0SZhao Qiang "fsl,t1040-qe-si". 1100883c2c0SZhao Qiang- reg : Address range of SI register set. 1110883c2c0SZhao Qiang 1120883c2c0SZhao QiangExample: 1130883c2c0SZhao Qiang 1140883c2c0SZhao Qiang si1: si@700 { 1150883c2c0SZhao Qiang compatible = "fsl,t1040-qe-si"; 1160883c2c0SZhao Qiang reg = <0x700 0x80>; 1170883c2c0SZhao Qiang }; 1180883c2c0SZhao Qiang 1190883c2c0SZhao Qiang* Serial Interface Block RAM(SIRAM) 1200883c2c0SZhao Qiang 1210883c2c0SZhao Qiangstore the routing entries of SI 1220883c2c0SZhao Qiang 1230883c2c0SZhao QiangRequired properties: 1240883c2c0SZhao Qiang- compatible : should be "fsl,<chip>-qe-siram". For t1040, must contain 1250883c2c0SZhao Qiang "fsl,t1040-qe-siram". 1260883c2c0SZhao Qiang- reg : Address range of SI RAM. 1270883c2c0SZhao Qiang 1280883c2c0SZhao QiangExample: 1290883c2c0SZhao Qiang 1300883c2c0SZhao Qiang siram1: siram@1000 { 1310883c2c0SZhao Qiang compatible = "fsl,t1040-qe-siram"; 1320883c2c0SZhao Qiang reg = <0x1000 0x800>; 1330883c2c0SZhao Qiang }; 1340883c2c0SZhao Qiang 1350883c2c0SZhao Qiang* QE Firmware Node 1360883c2c0SZhao Qiang 1370883c2c0SZhao QiangThis node defines a firmware binary that is embedded in the device tree, for 1380883c2c0SZhao Qiangthe purpose of passing the firmware from bootloader to the kernel, or from 1390883c2c0SZhao Qiangthe hypervisor to the guest. 1400883c2c0SZhao Qiang 1410883c2c0SZhao QiangThe firmware node itself contains the firmware binary contents, a compatible 1420883c2c0SZhao Qiangproperty, and any firmware-specific properties. The node should be placed 1430883c2c0SZhao Qianginside a QE node that needs it. Doing so eliminates the need for a 1440883c2c0SZhao Qiangfsl,firmware-phandle property. Other QE nodes that need the same firmware 1450883c2c0SZhao Qiangshould define an fsl,firmware-phandle property that points to the firmware node 1460883c2c0SZhao Qiangin the first QE node. 1470883c2c0SZhao Qiang 1480883c2c0SZhao QiangThe fsl,firmware property can be specified in the DTS (possibly using incbin) 1490883c2c0SZhao Qiangor can be inserted by the boot loader at boot time. 1500883c2c0SZhao Qiang 1510883c2c0SZhao QiangRequired properties: 1520883c2c0SZhao Qiang - compatible 1530883c2c0SZhao Qiang Usage: required 1540883c2c0SZhao Qiang Value type: <string> 1550883c2c0SZhao Qiang Definition: A standard property. Specify a string that indicates what 1560883c2c0SZhao Qiang kind of firmware it is. For QE, this should be "fsl,qe-firmware". 1570883c2c0SZhao Qiang 1580883c2c0SZhao Qiang - fsl,firmware 1590883c2c0SZhao Qiang Usage: required 1600883c2c0SZhao Qiang Value type: <prop-encoded-array>, encoded as an array of bytes 1610883c2c0SZhao Qiang Definition: A standard property. This property contains the firmware 1620883c2c0SZhao Qiang binary "blob". 1630883c2c0SZhao Qiang 1640883c2c0SZhao QiangExample: 1650883c2c0SZhao Qiang qe1@e0080000 { 1660883c2c0SZhao Qiang compatible = "fsl,qe"; 1670883c2c0SZhao Qiang qe_firmware:qe-firmware { 1680883c2c0SZhao Qiang compatible = "fsl,qe-firmware"; 1690883c2c0SZhao Qiang fsl,firmware = [0x70 0xcd 0x00 0x00 0x01 0x46 0x45 ...]; 1700883c2c0SZhao Qiang }; 1710883c2c0SZhao Qiang ... 1720883c2c0SZhao Qiang }; 1730883c2c0SZhao Qiang 1740883c2c0SZhao Qiang qe2@e0090000 { 1750883c2c0SZhao Qiang compatible = "fsl,qe"; 1760883c2c0SZhao Qiang fsl,firmware-phandle = <&qe_firmware>; 1770883c2c0SZhao Qiang ... 1780883c2c0SZhao Qiang }; 179