| /openbmc/linux/Documentation/devicetree/bindings/ptp/ |
| H A D | brcm,ptp-dte.txt | 1 * Broadcom Digital Timing Engine(DTE) based PTP clock
9 "brcm,ptp-dte"
11 "brcm,iproc-ptp-dte" - for iproc based SoC's
12 - reg: address and length of the DTE block's NCO registers
16 ptp: ptp-dte@180af650 {
17 compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
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| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3_its.c | 210 * by the dte @dte. Returns true on success, false if there was a memory
213 static bool update_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *dte, in update_ite() argument
218 hwaddr iteaddr = dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; in update_ite()
222 trace_gicv3_its_ite_write(dte->ittaddr, eventid, ite->valid, in update_ite()
245 * by the DTE @dte. On success, we return MEMTX_OK and populate the ITEntry
250 const DTEntry *dte, ITEntry *ite) in get_ite() argument
256 hwaddr iteaddr = dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; in get_ite()
260 trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); in get_ite()
266 trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); in get_ite()
276 trace_gicv3_its_ite_read(dte->ittaddr, eventid, ite->valid, in get_ite()
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| /openbmc/linux/drivers/iommu/ |
| H A D | rockchip-iommu.c | 98 phys_addr_t (*pt_address)(u32 dte);
160 * | DTE | -> +-----+
174 * Each DTE has a PT address and a valid bit:
185 static inline phys_addr_t rk_dte_pt_address(u32 dte) in rk_dte_pt_address() argument
187 return (phys_addr_t)dte & RK_DTE_PT_ADDRESS_MASK; in rk_dte_pt_address()
206 static inline phys_addr_t rk_dte_pt_address_v2(u32 dte) in rk_dte_pt_address_v2() argument
208 u64 dte_v2 = dte; in rk_dte_pt_address_v2()
217 static inline bool rk_dte_is_pt_valid(u32 dte) in rk_dte_is_pt_valid() argument
219 return dte & RK_DTE_PT_VALID; in rk_dte_is_pt_valid()
307 * | DTE index | PTE index | Page offset |
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| H A D | sun50i-iommu.c | 151 * 4096 4-bytes Directory Table Entries (DTE), each pointing to a Page
196 static phys_addr_t sun50i_dte_get_pt_address(u32 dte) in sun50i_dte_get_pt_address() argument
198 return (phys_addr_t)dte & SUN50I_DTE_PT_ADDRESS_MASK; in sun50i_dte_get_pt_address()
201 static bool sun50i_dte_is_pt_valid(u32 dte) in sun50i_dte_is_pt_valid() argument
203 return (dte & SUN50I_DTE_PT_ATTRS) == SUN50I_DTE_PT_VALID; in sun50i_dte_is_pt_valid()
560 u32 dte; in sun50i_dte_get_page_table() local
563 dte = *dte_addr; in sun50i_dte_get_page_table()
564 if (sun50i_dte_is_pt_valid(dte)) { in sun50i_dte_get_page_table()
565 phys_addr_t pt_phys = sun50i_dte_get_pt_address(dte); in sun50i_dte_get_page_table()
573 dte = sun50i_mk_dte(virt_to_phys(page_table)); in sun50i_dte_get_page_table()
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| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-sh_mobile.c | 32 /* IRQ: DTE WAIT */
39 /* IRQ: DTE WAIT WAIT */
40 /* ICIC: -DTE */
46 /* IRQ: DTE WAIT WAIT WAIT */
47 /* ICIC: -DTE */
60 /* IRQ: DTE WAIT | WAIT DTE */
61 /* ICIC: -DTE | +DTE */
67 /* IRQ: DTE WAIT | WAIT WAIT DTE */
68 /* ICIC: -DTE | +DTE */
74 /* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
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| /openbmc/qemu/hw/i386/ |
| H A D | amd_iommu.c | 849 uint64_t *dte) in amdvi_validate_dte() argument
851 if ((dte[0] & AMDVI_DTE_LOWER_QUAD_RESERVED) in amdvi_validate_dte()
852 || (dte[1] & AMDVI_DTE_MIDDLE_QUAD_RESERVED) in amdvi_validate_dte()
853 || (dte[2] & AMDVI_DTE_UPPER_QUAD_RESERVED) || dte[3]) { in amdvi_validate_dte()
871 /* log error accessing dte */ in amdvi_get_dte()
926 static void amdvi_page_walk(AMDVIAddressSpace *as, uint64_t *dte, in amdvi_page_walk() argument
931 uint64_t pte = dte[0], pte_addr, page_mask; in amdvi_page_walk()
933 /* make sure the DTE has TV = 1 */ in amdvi_page_walk()
1068 static int amdvi_get_irte(AMDVIState *s, MSIMessage *origin, uint64_t *dte, in amdvi_get_irte() argument
1073 irte_root = dte[2] & AMDVI_IR_PHYS_ADDR_MASK; in amdvi_get_irte()
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| /openbmc/u-boot/doc/device-tree-bindings/serial/ |
| H A D | mxc-serial.txt | 8 - fsl,dte-mode: use DTE mode
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| /openbmc/linux/net/x25/ |
| H A D | x25_facilities.c | 32 * @dte_facs: ITU DTE facilities, updated as DTE facilities are found
266 struct x25_facilities *new, struct x25_dte_facilities *dte) in x25_negotiate_facilities() argument
275 memset(dte, 0, sizeof(*dte)); in x25_negotiate_facilities()
277 len = x25_parse_facilities(skb, &theirs, dte, &x25->vc_facil_mask); in x25_negotiate_facilities()
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | fsl-imx-uart.yaml | 73 fsl,dte-mode:
76 Indicate the uart works in DTE mode. The uart works in DCE mode by default.
131 fsl,dte-mode;
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| /openbmc/linux/drivers/ptp/ |
| H A D | ptp_dte.c | 40 /* ptp dte priv structure */
218 .name = "DTE PTP timer",
320 { .compatible = "brcm,ptp-dte", },
327 .name = "ptp-dte",
337 MODULE_DESCRIPTION("Broadcom DTE PTP Clock driver");
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| H A D | Kconfig | 43 tristate "Broadcom DTE as PTP clock"
50 (DTE) in the Broadcom SoC's as a PTP clock.
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6qdl-apalis.dtsi | 796 fsl,dte-mode;
804 fsl,dte-mode;
812 fsl,dte-mode;
819 fsl,dte-mode;
1260 /* DTE mode */
1277 /* DTE mode */
1294 /* DTE mode */
1309 /* DTE mode */
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| H A D | imx6dl-eckelmann-ci4x10.dts | 332 fsl,dte-mode;
343 fsl,dte-mode;
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| H A D | imx6ull-colibri.dtsi | 274 fsl,dte-mode;
282 fsl,dte-mode;
289 fsl,dte-mode;
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| /openbmc/linux/include/uapi/linux/ |
| H A D | x25.h | 67 * DTE/DCE subscription options.
111 * ITU DTE facilities
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| H A D | atmsap.h | 36 #define ATM_L2_ISO7776 0x11 /* ISO 7776 DTE-DTE */
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| /openbmc/u-boot/board/toradex/apalis_imx6/ |
| H A D | Kconfig | 50 otherwise the UARTs are configuered in DTE mode.
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | imx6ull-colibri.dts | 165 fsl,dte-mode;
173 fsl,dte-mode;
179 fsl,dte-mode;
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| H A D | imx7-colibri.dtsi | 37 fsl,dte-mode;
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| H A D | imx6ull-14x14-evk.dts | 475 /* for DTE mode, add below change */
476 /* fsl,dte-mode; */
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| /openbmc/linux/drivers/net/wan/ |
| H A D | wanxl.c | 9 * - Only DTE (external clock) support with NRZ and NRZI encodings
112 const char *cable, *pm, *dte = "", *dsr = "", *dcd = ""; in wanxl_cable_intr() local
163 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE"; in wanxl_cable_intr()
166 pm, dte, cable, dsr, dcd); in wanxl_cable_intr()
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| /openbmc/linux/Documentation/virt/kvm/devices/ |
| H A D | arm-vgic-its.rst | 156 Device Table Entry (DTE)::
166 corresponds to the DeviceID offset to the next DTE, capped by
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| /openbmc/u-boot/drivers/net/phy/ |
| H A D | generic_10g.c | 54 * XS or DTE XS; give up if none is present. */ in gen10g_discover_mmds()
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| /openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_emac.h | 33 u32 dte; member
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| /openbmc/linux/include/uapi/linux/hdlc/ |
| H A D | ioctl.h | 9 #define CLOCK_EXT 1 /* External TX and RX clock - DTE */
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