1d371c011SMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0 2d371c011SMauro Carvalho Chehab 3d371c011SMauro Carvalho Chehab=============================================== 4d371c011SMauro Carvalho ChehabARM Virtual Interrupt Translation Service (ITS) 5d371c011SMauro Carvalho Chehab=============================================== 6d371c011SMauro Carvalho Chehab 7d371c011SMauro Carvalho ChehabDevice types supported: 8d371c011SMauro Carvalho Chehab KVM_DEV_TYPE_ARM_VGIC_ITS ARM Interrupt Translation Service Controller 9d371c011SMauro Carvalho Chehab 10d371c011SMauro Carvalho ChehabThe ITS allows MSI(-X) interrupts to be injected into guests. This extension is 11d371c011SMauro Carvalho Chehaboptional. Creating a virtual ITS controller also requires a host GICv3 (see 12d371c011SMauro Carvalho Chehabarm-vgic-v3.txt), but does not depend on having physical ITS controllers. 13d371c011SMauro Carvalho Chehab 14d371c011SMauro Carvalho ChehabThere can be multiple ITS controllers per guest, each of them has to have 15d371c011SMauro Carvalho Chehaba separate, non-overlapping MMIO region. 16d371c011SMauro Carvalho Chehab 17d371c011SMauro Carvalho Chehab 18d371c011SMauro Carvalho ChehabGroups 19d371c011SMauro Carvalho Chehab====== 20d371c011SMauro Carvalho Chehab 21d371c011SMauro Carvalho ChehabKVM_DEV_ARM_VGIC_GRP_ADDR 22d371c011SMauro Carvalho Chehab------------------------- 23d371c011SMauro Carvalho Chehab 24d371c011SMauro Carvalho Chehab Attributes: 25d371c011SMauro Carvalho Chehab KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit) 26d371c011SMauro Carvalho Chehab Base address in the guest physical address space of the GICv3 ITS 27d371c011SMauro Carvalho Chehab control register frame. 28d371c011SMauro Carvalho Chehab This address needs to be 64K aligned and the region covers 128K. 29d371c011SMauro Carvalho Chehab 30d371c011SMauro Carvalho Chehab Errors: 31d371c011SMauro Carvalho Chehab 32d371c011SMauro Carvalho Chehab ======= ================================================= 33d371c011SMauro Carvalho Chehab -E2BIG Address outside of addressable IPA range 34d371c011SMauro Carvalho Chehab -EINVAL Incorrectly aligned address 35d371c011SMauro Carvalho Chehab -EEXIST Address already configured 36d371c011SMauro Carvalho Chehab -EFAULT Invalid user pointer for attr->addr. 37d371c011SMauro Carvalho Chehab -ENODEV Incorrect attribute or the ITS is not supported. 38d371c011SMauro Carvalho Chehab ======= ================================================= 39d371c011SMauro Carvalho Chehab 40d371c011SMauro Carvalho Chehab 41d371c011SMauro Carvalho ChehabKVM_DEV_ARM_VGIC_GRP_CTRL 42d371c011SMauro Carvalho Chehab------------------------- 43d371c011SMauro Carvalho Chehab 44d371c011SMauro Carvalho Chehab Attributes: 45d371c011SMauro Carvalho Chehab KVM_DEV_ARM_VGIC_CTRL_INIT 46d371c011SMauro Carvalho Chehab request the initialization of the ITS, no additional parameter in 47d371c011SMauro Carvalho Chehab kvm_device_attr.addr. 48d371c011SMauro Carvalho Chehab 49d371c011SMauro Carvalho Chehab KVM_DEV_ARM_ITS_CTRL_RESET 50d371c011SMauro Carvalho Chehab reset the ITS, no additional parameter in kvm_device_attr.addr. 51d371c011SMauro Carvalho Chehab See "ITS Reset State" section. 52d371c011SMauro Carvalho Chehab 53d371c011SMauro Carvalho Chehab KVM_DEV_ARM_ITS_SAVE_TABLES 54d371c011SMauro Carvalho Chehab save the ITS table data into guest RAM, at the location provisioned 55*86bdf3ebSGavin Shan by the guest in corresponding registers/table entries. Should userspace 56*86bdf3ebSGavin Shan require a form of dirty tracking to identify which pages are modified 57*86bdf3ebSGavin Shan by the saving process, it should use a bitmap even if using another 58*86bdf3ebSGavin Shan mechanism to track the memory dirtied by the vCPUs. 59d371c011SMauro Carvalho Chehab 60d371c011SMauro Carvalho Chehab The layout of the tables in guest memory defines an ABI. The entries 61d371c011SMauro Carvalho Chehab are laid out in little endian format as described in the last paragraph. 62d371c011SMauro Carvalho Chehab 63d371c011SMauro Carvalho Chehab KVM_DEV_ARM_ITS_RESTORE_TABLES 64d371c011SMauro Carvalho Chehab restore the ITS tables from guest RAM to ITS internal structures. 65d371c011SMauro Carvalho Chehab 66d371c011SMauro Carvalho Chehab The GICV3 must be restored before the ITS and all ITS registers but 67d371c011SMauro Carvalho Chehab the GITS_CTLR must be restored before restoring the ITS tables. 68d371c011SMauro Carvalho Chehab 69d371c011SMauro Carvalho Chehab The GITS_IIDR read-only register must also be restored before 70d371c011SMauro Carvalho Chehab calling KVM_DEV_ARM_ITS_RESTORE_TABLES as the IIDR revision field 71d371c011SMauro Carvalho Chehab encodes the ABI revision. 72d371c011SMauro Carvalho Chehab 73d371c011SMauro Carvalho Chehab The expected ordering when restoring the GICv3/ITS is described in section 74d371c011SMauro Carvalho Chehab "ITS Restore Sequence". 75d371c011SMauro Carvalho Chehab 76d371c011SMauro Carvalho Chehab Errors: 77d371c011SMauro Carvalho Chehab 78d371c011SMauro Carvalho Chehab ======= ========================================================== 79d371c011SMauro Carvalho Chehab -ENXIO ITS not properly configured as required prior to setting 80d371c011SMauro Carvalho Chehab this attribute 81d371c011SMauro Carvalho Chehab -ENOMEM Memory shortage when allocating ITS internal data 82d371c011SMauro Carvalho Chehab -EINVAL Inconsistent restored data 83d371c011SMauro Carvalho Chehab -EFAULT Invalid guest ram access 84d371c011SMauro Carvalho Chehab -EBUSY One or more VCPUS are running 85d371c011SMauro Carvalho Chehab -EACCES The virtual ITS is backed by a physical GICv4 ITS, and the 868082d50fSShenming Lu state is not available without GICv4.1 87d371c011SMauro Carvalho Chehab ======= ========================================================== 88d371c011SMauro Carvalho Chehab 89d371c011SMauro Carvalho ChehabKVM_DEV_ARM_VGIC_GRP_ITS_REGS 90d371c011SMauro Carvalho Chehab----------------------------- 91d371c011SMauro Carvalho Chehab 92d371c011SMauro Carvalho Chehab Attributes: 93d371c011SMauro Carvalho Chehab The attr field of kvm_device_attr encodes the offset of the 94d371c011SMauro Carvalho Chehab ITS register, relative to the ITS control frame base address 95d371c011SMauro Carvalho Chehab (ITS_base). 96d371c011SMauro Carvalho Chehab 97d371c011SMauro Carvalho Chehab kvm_device_attr.addr points to a __u64 value whatever the width 98d371c011SMauro Carvalho Chehab of the addressed register (32/64 bits). 64 bit registers can only 99d371c011SMauro Carvalho Chehab be accessed with full length. 100d371c011SMauro Carvalho Chehab 101d371c011SMauro Carvalho Chehab Writes to read-only registers are ignored by the kernel except for: 102d371c011SMauro Carvalho Chehab 103d371c011SMauro Carvalho Chehab - GITS_CREADR. It must be restored otherwise commands in the queue 104d371c011SMauro Carvalho Chehab will be re-executed after restoring CWRITER. GITS_CREADR must be 105d371c011SMauro Carvalho Chehab restored before restoring the GITS_CTLR which is likely to enable the 106d371c011SMauro Carvalho Chehab ITS. Also it must be restored after GITS_CBASER since a write to 107d371c011SMauro Carvalho Chehab GITS_CBASER resets GITS_CREADR. 108d371c011SMauro Carvalho Chehab - GITS_IIDR. The Revision field encodes the table layout ABI revision. 109d371c011SMauro Carvalho Chehab In the future we might implement direct injection of virtual LPIs. 110d371c011SMauro Carvalho Chehab This will require an upgrade of the table layout and an evolution of 111d371c011SMauro Carvalho Chehab the ABI. GITS_IIDR must be restored before calling 112d371c011SMauro Carvalho Chehab KVM_DEV_ARM_ITS_RESTORE_TABLES. 113d371c011SMauro Carvalho Chehab 114d371c011SMauro Carvalho Chehab For other registers, getting or setting a register has the same 115d371c011SMauro Carvalho Chehab effect as reading/writing the register on real hardware. 116d371c011SMauro Carvalho Chehab 117d371c011SMauro Carvalho Chehab Errors: 118d371c011SMauro Carvalho Chehab 119d371c011SMauro Carvalho Chehab ======= ==================================================== 120d371c011SMauro Carvalho Chehab -ENXIO Offset does not correspond to any supported register 121d371c011SMauro Carvalho Chehab -EFAULT Invalid user pointer for attr->addr 122d371c011SMauro Carvalho Chehab -EINVAL Offset is not 64-bit aligned 123d371c011SMauro Carvalho Chehab -EBUSY one or more VCPUS are running 124d371c011SMauro Carvalho Chehab ======= ==================================================== 125d371c011SMauro Carvalho Chehab 126d371c011SMauro Carvalho ChehabITS Restore Sequence: 127d371c011SMauro Carvalho Chehab--------------------- 128d371c011SMauro Carvalho Chehab 129d371c011SMauro Carvalho ChehabThe following ordering must be followed when restoring the GIC and the ITS: 130d371c011SMauro Carvalho Chehab 131d371c011SMauro Carvalho Chehaba) restore all guest memory and create vcpus 132d371c011SMauro Carvalho Chehabb) restore all redistributors 133d371c011SMauro Carvalho Chehabc) provide the ITS base address 134d371c011SMauro Carvalho Chehab (KVM_DEV_ARM_VGIC_GRP_ADDR) 135d371c011SMauro Carvalho Chehabd) restore the ITS in the following order: 136d371c011SMauro Carvalho Chehab 137d371c011SMauro Carvalho Chehab 1. Restore GITS_CBASER 138d371c011SMauro Carvalho Chehab 2. Restore all other ``GITS_`` registers, except GITS_CTLR! 139d371c011SMauro Carvalho Chehab 3. Load the ITS table data (KVM_DEV_ARM_ITS_RESTORE_TABLES) 140d371c011SMauro Carvalho Chehab 4. Restore GITS_CTLR 141d371c011SMauro Carvalho Chehab 142d371c011SMauro Carvalho ChehabThen vcpus can be started. 143d371c011SMauro Carvalho Chehab 144d371c011SMauro Carvalho ChehabITS Table ABI REV0: 145d371c011SMauro Carvalho Chehab------------------- 146d371c011SMauro Carvalho Chehab 147d371c011SMauro Carvalho Chehab Revision 0 of the ABI only supports the features of a virtual GICv3, and does 148d371c011SMauro Carvalho Chehab not support a virtual GICv4 with support for direct injection of virtual 149d371c011SMauro Carvalho Chehab interrupts for nested hypervisors. 150d371c011SMauro Carvalho Chehab 151d371c011SMauro Carvalho Chehab The device table and ITT are indexed by the DeviceID and EventID, 152d371c011SMauro Carvalho Chehab respectively. The collection table is not indexed by CollectionID, and the 153d371c011SMauro Carvalho Chehab entries in the collection are listed in no particular order. 154d371c011SMauro Carvalho Chehab All entries are 8 bytes. 155d371c011SMauro Carvalho Chehab 156d371c011SMauro Carvalho Chehab Device Table Entry (DTE):: 157d371c011SMauro Carvalho Chehab 158d371c011SMauro Carvalho Chehab bits: | 63| 62 ... 49 | 48 ... 5 | 4 ... 0 | 159d371c011SMauro Carvalho Chehab values: | V | next | ITT_addr | Size | 160d371c011SMauro Carvalho Chehab 161d371c011SMauro Carvalho Chehab where: 162d371c011SMauro Carvalho Chehab 163d371c011SMauro Carvalho Chehab - V indicates whether the entry is valid. If not, other fields 164d371c011SMauro Carvalho Chehab are not meaningful. 165d371c011SMauro Carvalho Chehab - next: equals to 0 if this entry is the last one; otherwise it 166d371c011SMauro Carvalho Chehab corresponds to the DeviceID offset to the next DTE, capped by 167d371c011SMauro Carvalho Chehab 2^14 -1. 168d371c011SMauro Carvalho Chehab - ITT_addr matches bits [51:8] of the ITT address (256 Byte aligned). 169d371c011SMauro Carvalho Chehab - Size specifies the supported number of bits for the EventID, 170d371c011SMauro Carvalho Chehab minus one 171d371c011SMauro Carvalho Chehab 172d371c011SMauro Carvalho Chehab Collection Table Entry (CTE):: 173d371c011SMauro Carvalho Chehab 174d371c011SMauro Carvalho Chehab bits: | 63| 62 .. 52 | 51 ... 16 | 15 ... 0 | 175d371c011SMauro Carvalho Chehab values: | V | RES0 | RDBase | ICID | 176d371c011SMauro Carvalho Chehab 177d371c011SMauro Carvalho Chehab where: 178d371c011SMauro Carvalho Chehab 179d371c011SMauro Carvalho Chehab - V indicates whether the entry is valid. If not, other fields are 180d371c011SMauro Carvalho Chehab not meaningful. 181d371c011SMauro Carvalho Chehab - RES0: reserved field with Should-Be-Zero-or-Preserved behavior. 182d371c011SMauro Carvalho Chehab - RDBase is the PE number (GICR_TYPER.Processor_Number semantic), 183d371c011SMauro Carvalho Chehab - ICID is the collection ID 184d371c011SMauro Carvalho Chehab 185d371c011SMauro Carvalho Chehab Interrupt Translation Entry (ITE):: 186d371c011SMauro Carvalho Chehab 187d371c011SMauro Carvalho Chehab bits: | 63 ... 48 | 47 ... 16 | 15 ... 0 | 188d371c011SMauro Carvalho Chehab values: | next | pINTID | ICID | 189d371c011SMauro Carvalho Chehab 190d371c011SMauro Carvalho Chehab where: 191d371c011SMauro Carvalho Chehab 192d371c011SMauro Carvalho Chehab - next: equals to 0 if this entry is the last one; otherwise it corresponds 193d371c011SMauro Carvalho Chehab to the EventID offset to the next ITE capped by 2^16 -1. 194d371c011SMauro Carvalho Chehab - pINTID is the physical LPI ID; if zero, it means the entry is not valid 195d371c011SMauro Carvalho Chehab and other fields are not meaningful. 196d371c011SMauro Carvalho Chehab - ICID is the collection ID 197d371c011SMauro Carvalho Chehab 198d371c011SMauro Carvalho ChehabITS Reset State: 199d371c011SMauro Carvalho Chehab---------------- 200d371c011SMauro Carvalho Chehab 201d371c011SMauro Carvalho ChehabRESET returns the ITS to the same state that it was when first created and 202d371c011SMauro Carvalho Chehabinitialized. When the RESET command returns, the following things are 203d371c011SMauro Carvalho Chehabguaranteed: 204d371c011SMauro Carvalho Chehab 205d371c011SMauro Carvalho Chehab- The ITS is not enabled and quiescent 206d371c011SMauro Carvalho Chehab GITS_CTLR.Enabled = 0 .Quiescent=1 207d371c011SMauro Carvalho Chehab- There is no internally cached state 208d371c011SMauro Carvalho Chehab- No collection or device table are used 209d371c011SMauro Carvalho Chehab GITS_BASER<n>.Valid = 0 210d371c011SMauro Carvalho Chehab- GITS_CBASER = 0, GITS_CREADR = 0, GITS_CWRITER = 0 211d371c011SMauro Carvalho Chehab- The ABI version is unchanged and remains the one set when the ITS 212d371c011SMauro Carvalho Chehab device was first created. 213