| /openbmc/u-boot/board/gateworks/gw_ventana/ |
| H A D | gw_ventana_spl.c | 205 * calibration - these are the various CPU/DDR3 combinations we support
208 /* write leveling calibration determine */
211 /* Read DQS Gating calibration */
214 /* Read Calibration: DQS delay relative to DQ read access */
216 /* Write Calibration: DQ/DM delay relative to DQS write access */
222 /* write leveling calibration determine */
227 /* Read DQS Gating calibration */
232 /* Read Calibration: DQS delay relative to DQ read access */
235 /* Write Calibration: DQ/DM delay relative to DQS write access */
242 /* write leveling calibration determine */
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| /openbmc/linux/drivers/soc/tegra/fuse/ |
| H A D | fuse-tegra30.c | 155 .name = "xusb-pad-calibration",
167 .name = "sata-calibration",
214 .cell_name = "xusb-pad-calibration",
216 .con_id = "calibration",
219 .cell_name = "sata-calibration",
221 .con_id = "calibration",
315 .name = "xusb-pad-calibration",
327 .name = "sata-calibration",
363 .name = "gpu-calibration",
369 .name = "xusb-pad-calibration-ext",
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-iio-bno055 | 36 Calibration" HW function.
49 Reports the binary calibration data blob for the IMU sensors.
56 Can be 0 (calibration non even enabled) or 1 to 5 where the greater
57 the number, the better the calibration status.
64 Can be 0 (calibration non even enabled) or 1 to 5 where the greater
65 the number, the better the calibration status.
72 Can be 0 (calibration non even enabled) or 1 to 5 where the greater
73 the number, the better the calibration status.
80 Can be 0 (calibration non even enabled) or 1 to 5 where the greater
81 the number, the better the calibration status.
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| H A D | sysfs-bus-iio-adc-ad7192 | 26 Initiates the system calibration procedure. This is done on a
27 single channel at a time. Write '1' to start the calibration.
40 Reading returns a list with the possible calibration modes.
49 Sets up the calibration mode used in the system calibration
50 procedure. Reading returns the current calibration mode.
51 Writing sets the system calibration mode.
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| H A D | sysfs-driver-hid-wiimote | 56 balance board. It provides a single line with 3 calibration
63 Calibration data is already applied by the kernel to all input
72 pro-controller. It provides a single line with 4 calibration
78 Calibration data is already applied by the kernel to all input
82 Calibration data is detected by the kernel during device setup.
83 You can write "scan\n" into this file to re-trigger calibration.
85 set the calibration values manually.
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| H A D | sysfs-bus-iio-frequency-admv1013 | 17 Read/write value for the Local Oscillatior Feedthrough Offset Calibration I Positive
24 Read/write value for the Local Oscillatior Feedthrough Offset Calibration Q Positive side.
30 Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration I Negative
37 Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration Q Negative
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| /openbmc/linux/drivers/power/supply/ |
| H A D | twl4030_madc_battery.c | 78 struct twl4030_madc_bat_calibration *calibration; in twl4030_madc_bat_voltscale() local
83 calibration = bat->pdata->charging; in twl4030_madc_bat_voltscale()
85 calibration = bat->pdata->discharging; in twl4030_madc_bat_voltscale()
87 if (volt > calibration[0].voltage) { in twl4030_madc_bat_voltscale()
88 res = calibration[0].level; in twl4030_madc_bat_voltscale()
90 for (i = 0; calibration[i+1].voltage >= 0; i++) { in twl4030_madc_bat_voltscale()
91 if (volt <= calibration[i].voltage && in twl4030_madc_bat_voltscale()
92 volt >= calibration[i+1].voltage) { in twl4030_madc_bat_voltscale()
94 res = calibration[i].level - in twl4030_madc_bat_voltscale()
95 ((calibration[i].voltage - volt) * in twl4030_madc_bat_voltscale()
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| /openbmc/u-boot/board/liebherr/display5/ |
| H A D | spl.c | 123 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
125 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
127 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
128 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
129 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
130 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
131 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
132 debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); in spl_dram_print_cal()
133 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
134 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
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| /openbmc/linux/Documentation/iio/ |
| H A D | bno055.rst | 20 2. Calibration
28 the IMU has successfully autocalibrated) and to the calibration data blob.
32 with this calibration data. This saves the user from performing the
33 calibration procedure every time (which consist of moving the IMU in
36 The driver looks for calibration data file using two different names: first
39 IMU instance. If this file is not found, then a "generic" calibration file
43 Valid calibration file names would be e.g.
48 offsets from calibration data (if any), so that the user can apply them to
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| /openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
| H A D | kp_imx6q_tpc_spl.c | 186 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
188 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
190 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
191 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
192 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
193 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
194 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
195 debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); in spl_dram_print_cal()
196 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
197 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
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| /openbmc/linux/drivers/rtc/ |
| H A D | rtc-ab8500.c | 206 static int ab8500_rtc_set_calibration(struct device *dev, int calibration) in ab8500_rtc_set_calibration() argument
212 * Check that the calibration value (which is in units of 0.5 in ab8500_rtc_set_calibration()
218 if ((calibration < -127) || (calibration > 127)) { in ab8500_rtc_set_calibration()
228 if (calibration >= 0) in ab8500_rtc_set_calibration()
229 rtccal = 0x7F & calibration; in ab8500_rtc_set_calibration()
231 rtccal = ~(calibration - 1) | 0x80; in ab8500_rtc_set_calibration()
239 static int ab8500_rtc_get_calibration(struct device *dev, int *calibration) in ab8500_rtc_get_calibration() argument
253 *calibration = 0 - (rtccal & 0x7F); in ab8500_rtc_get_calibration()
255 *calibration = 0x7F & rtccal; in ab8500_rtc_get_calibration()
266 int calibration = 0; in ab8500_sysfs_store_rtc_calibration() local
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| H A D | rtc-tps65910.c | 202 static int tps65910_rtc_set_calibration(struct device *dev, int calibration) in tps65910_rtc_set_calibration() argument
219 if ((calibration < -32768) || (calibration > 32766)) { in tps65910_rtc_set_calibration()
220 dev_err(dev, "RTC calibration value out of range: %d\n", in tps65910_rtc_set_calibration()
221 calibration); in tps65910_rtc_set_calibration()
225 value = (s16)calibration; in tps65910_rtc_set_calibration()
247 static int tps65910_rtc_get_calibration(struct device *dev, int *calibration) in tps65910_rtc_get_calibration() argument
261 *calibration = 0; in tps65910_rtc_get_calibration()
274 *calibration = (s16)value; in tps65910_rtc_get_calibration()
281 int calibration; in tps65910_read_offset() local
285 ret = tps65910_rtc_get_calibration(dev, &calibration); in tps65910_read_offset()
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| /openbmc/linux/drivers/net/wireless/broadcom/b43/ |
| H A D | phy_lp.h | 322 #define B2062_N_IQ_CALIB B43_LP_NORTH(0x016) /* IQ Calibration (north) */
390 #define B2062_N_IQ_CALIB_CTL0 B43_LP_NORTH(0x05A) /* IQ Calibration Control 0 (north) */
391 #define B2062_N_IQ_CALIB_CTL1 B43_LP_NORTH(0x05B) /* IQ Calibration Control 1 (north) */
392 #define B2062_N_IQ_CALIB_CTL2 B43_LP_NORTH(0x05C) /* IQ Calibration Control 2 (north) */
393 #define B2062_N_CALIB_TS B43_LP_NORTH(0x05D) /* Calibration TS (north) */
394 #define B2062_N_CALIB_CTL0 B43_LP_NORTH(0x05E) /* Calibration Control 0 (north) */
395 #define B2062_N_CALIB_CTL1 B43_LP_NORTH(0x05F) /* Calibration Control 1 (north) */
396 #define B2062_N_CALIB_CTL2 B43_LP_NORTH(0x060) /* Calibration Control 2 (north) */
397 #define B2062_N_CALIB_CTL3 B43_LP_NORTH(0x061) /* Calibration Control 3 (north) */
398 #define B2062_N_CALIB_CTL4 B43_LP_NORTH(0x062) /* Calibration Control 4 (north) */
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | ddrmc-vf610-calibration.h | 3 * ddrmc DDR3 calibration code for NXP's VF610
14 * Number of "samples" in the calibration bitmap
15 * to be considered during calibration.
21 * falling edge in the calibration bitmap
34 * ddrmc_calibration - Vybrid's (VF610) DDR3 calibration code
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| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | qcom,pm8018-adc.yaml | 71 Note that channels c, d and f must be present for calibration.
72 These three nodes are used for absolute and ratiometric calibration
75 an interpolation calibration for all other ADCs.
92 Channel calibration type. If this property is specified
94 calibration. The available references are specified in the
96 to also specify this reference if ratiometric calibration
101 known as an absolute calibration.
103 The reference voltage pairs when using ratiometric calibration:
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| /openbmc/u-boot/board/ccv/xpress/ |
| H A D | imximage.cfg | 94 * Calibration setup
97 periodic HW ZQ calibration. */
100 * For target board, may need to run write leveling calibration to fine tune
105 /* Read DQS Gating calibration */
108 /* Read calibration */
111 /* Write calibration */
128 /* Complete calibration by forced measurement: */
131 * Calibration setup end
164 DATA 4 0x021b001c 0x04008040 /* MMDC0_MDSCR, ZQ calibration command sent to
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | nvidia,tegra20-sdhci.yaml | 113 description: Specify drive strength calibration offsets for 1.8 V
119 automatic calibration times out on a 1.8 V signaling mode.
123 description: Specify drive strength calibration offsets for 3.3 V
129 automatic calibration times out on a 3.3 V signaling mode.
133 description: Specify drive strength calibration offsets for SDR104 mode.
137 description: Specify drive strength calibration offsets for HS400 mode.
141 description: Specify drive strength calibration offsets for 1.8 V
147 automatic calibration times out on a 1.8 V signaling mode.
151 description: Specify drive strength calibration offsets for 3.3 V
164 automatic calibration times out on a 3.3 V signaling mode.
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| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 115 * Stash old values in case calibration fails, in mmdc_do_write_level_calibration()
131 debug("Starting write leveling calibration.\n"); in mmdc_do_write_level_calibration()
134 * 2. disable auto refresh and ZQ calibration in mmdc_do_write_level_calibration()
135 * before proceeding with Write Leveling calibration in mmdc_do_write_level_calibration()
158 /* 6. Activate automatic calibration by setting MPWLGCR[HW_WL_EN] */ in mmdc_do_write_level_calibration()
177 debug("Ending write leveling calibration. Error mask: 0x%x\n", errors); in mmdc_do_write_level_calibration()
290 /* Disable auto refresh before proceeding with calibration */ in mmdc_do_dqs_calibration()
307 * Check MDMISC register CALIB_PER_CS to see which CS calibration in mmdc_do_dqs_calibration()
309 * as this is the default value, indicating calibration is directed in mmdc_do_dqs_calibration()
311 * Disable the other chip select not being target for calibration in mmdc_do_dqs_calibration()
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| /openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | mtk-svs.yaml | 44 Phandle to the calibration data provided by a nvmem device.
51 - const: svs-calibration-data
52 - const: t-calibration-data
89 nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
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| /openbmc/u-boot/board/aristainetos/ |
| H A D | mt41j128M.cfg | 5 /* ZQ Calibration */
13 * DQS gating, read delay, write delay calibration values
14 * based on calibration compare of 0x00ffff00
33 /* Complete calibration by forced measurment */
60 /* ZQ calibration */
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| /openbmc/linux/drivers/thermal/ |
| H A D | amlogic_thermal.c | 15 * A B m n : calibration parameters
16 * u_efuse : fused calibration value, it's a signed 16 bits value
68 * @A: calibration parameters
69 * @B: calibration parameters
70 * @m: calibration parameters
71 * @n: calibration parameters
84 * @u_efuse_off: register offset to read fused calibration value
85 * @calibration_parameters: calibration parameters structure pointer
149 "tsensor thermal calibration not supported: 0x%x!\n", in amlogic_thermal_initialize()
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | tsc.c | 504 * or PIT for the fast calibration to work.
631 pr_info("Fast TSC calibration failed\n"); in quick_pit_calibrate()
650 pr_info("Fast TSC calibration using PIT\n"); in quick_pit_calibrate()
761 * Run 5 calibration loops to get the lowest frequency value in pit_hpet_ptimer_calibrate_cpu()
762 * (the best estimate). We use two different calibration modes in pit_hpet_ptimer_calibrate_cpu()
781 * calibration delay loop as we have to wait for a certain in pit_hpet_ptimer_calibrate_cpu()
796 * calibration, which will take at least 50ms, and in pit_hpet_ptimer_calibrate_cpu()
805 /* Pick the lowest PIT TSC calibration so far */ in pit_hpet_ptimer_calibrate_cpu()
829 * If both calibration results are inside a 10% window in pit_hpet_ptimer_calibrate_cpu()
830 * then we can be sure, that the calibration in pit_hpet_ptimer_calibrate_cpu()
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| /openbmc/linux/Documentation/devicetree/bindings/rtc/ |
| H A D | xlnx,zynqmp-rtc.yaml | 41 calibration:
43 calibration value for 1 sec period which will
44 be programmed directly to calibration register.
71 calibration = <0x198233>;
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| /openbmc/linux/Documentation/devicetree/bindings/thermal/ |
| H A D | allwinner,sun8i-a83t-ths.yaml | 47 description: Calibration data for thermal sensors
50 const: calibration
132 nvmem-cell-names = "calibration";
145 nvmem-cell-names = "calibration";
158 nvmem-cell-names = "calibration";
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| /openbmc/u-boot/board/freescale/mx6qarm2/ |
| H A D | imximage_mx6dl.cfg | 152 /* Calibration setup. */
153 /* DDR_PHY_P0_MPZQHWCTRL, enable on time ZQ calibration */
192 * a. DQS gating is not relevant for LPDDR2. DSQ gating calibration section
193 * should be skipped, or the write/read calibration comming after that
195 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
219 /* Calibration setup end */
312 * calibration values based on calibration compare of 0x00ffff00:
313 * Note, these calibration values are based on Freescale's board
314 * May need to run calibration on target board to fine tune these
317 /* DDR_PHY_P0_MPZQHWCTRL, enable automatic ZQ calibration */
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