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/openbmc/qemu/include/libdecnumber/
H A DdecDPD.h29 02110-1301, USA. */
31 /* ------------------------------------------------------------------------ */
33 /* [Automatically generated -- do not edit. 2007.05.05] */
34 /* ------------------------------------------------------------------------ */
35 /* ------------------------------------------------------------------------ */
41 /* uint16_t BCD2DPD[2458]; -- BCD -> DPD (0x999 => 2457) */
42 /* uint16_t BIN2DPD[1000]; -- Bin -> DPD (999 => 2457) */
43 /* uint8_t BIN2CHAR[4001]; -- Bin -> CHAR (999 => '\3' '9' '9' '9') */
44 /* uint8_t BIN2BCD8[4000]; -- Bin -> bytes (999 => 9 9 9 3) */
45 /* uint16_t DPD2BCD[1024]; -- DPD -> BCD (0x3FF => 0x999) */
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/openbmc/phosphor-webui/app/assets/images/
H A DDMTF_Redfish_logo_2017.svg1 …-color="#20ac4b"/><stop offset=".9831" stop-color="#19361a"/></linearGradient><linearGradient id="…
/openbmc/linux/arch/powerpc/lib/
H A Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
21 or 3,3,3
28 or 3,3,3
33 or 3,3,3
38 or 3,3,3
45 or 3,3,3
53 or 3,3,3
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/openbmc/u-boot/lib/libavb/
H A Davb_sha256.c1 // SPDX-License-Identifier: BSD-3-Clause
6 * FIPS 180-2 SHA-224/256/384/512 implementation
14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
15 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
21 #define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
26 *((str) + 3) = (uint8_t)((x)); \
34 *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
42 { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
75 /* SHA-256 implementation */
80 ctx->h[i] = sha256_h0[i]; in avb_sha256_init()
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/openbmc/linux/fs/exfat/
H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
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/openbmc/linux/arch/m68k/lib/
H A Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
54 "clrl %3\n\t" in csum_partial()
55 "addxl %3,%0\n" /* add X bit */ in csum_partial()
58 "movel %1,%3\n\t" /* save len in tmp1 */ in csum_partial()
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/openbmc/linux/arch/alpha/lib/
H A Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
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/openbmc/linux/Documentation/input/devices/
H A Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
17 3. Differentiating hardware versions
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
38 7.2.3 Motion packet
39 8. Trackpoint (for Hardware version 3 and 4)
50 hardware versions unimaginatively called version 1,version 2, version 3
54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and
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/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
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/openbmc/linux/arch/arm/mach-rpc/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
56 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
57 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
58 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
59 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
60 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
61 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
62 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
63 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
121 d->mask = mask; in iomd_set_base_mask()
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/openbmc/linux/include/dt-bindings/pinctrl/
H A Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 #define IMX8DXL_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
170 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO7_IO05 IMX8DXL_USB_SS3_TC2 5
174 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO7_IO06 IMX8DXL_USB_SS3_TC3 5
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/openbmc/linux/lib/zstd/compress/
H A Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
24 { /* "default" - for any srcSize > 256 KB */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
31 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
32 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
33 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
34 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
46 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
48 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
50 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
52 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
54 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
56 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
58 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
60 { 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
61 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
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/openbmc/linux/arch/mips/include/asm/
H A Dpgtable-32.h19 #include <asm-generic/pgtable-nopmd.h>
26 * Regarding 32-bit MIPS huge page support (and the tradeoff it entails):
28 * We use the same huge page sizes as 64-bit MIPS. Assuming a 4KB page size,
29 * our 2-level table layout would normally have a PGD entry cover a contiguous
30 * 4MB virtual address region (pointing to a 4KB PTE page of 1,024 32-bit pte_t
37 * increases to match 64-bit MIPS, but PTE lookups remain CPU cache-friendly.
39 * NOTE: We don't yet support huge pages if extended-addressing is enabled
40 * (i.e. EVA, XPA, 36-bit Alchemy/Netlogic).
46 * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
56 * Basically we have the same two-level (which is the logical three level
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/openbmc/linux/arch/powerpc/crypto/
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
28 # setup r^4, r^3, r^2, r vectors
29 # vs [r^1, r^3, r^2, r^4]
35 # vs5 = [r1*5,...]
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H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
16 # 3. a += b; d ^= a; d <<<= 8;
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
199 vadduwm 1, 1, 5
201 vadduwm 3, 3, 7
210 vpermxor 15, 15, 3, 25
225 vxor 5, 5, 9
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/openbmc/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * [20-19] : Op0
20 * [18-16] : Op1
21 * [15-12] : CRn
22 * [11-8] : CRm
23 * [7-5] : Op2
33 #define Op2_shift 5
80 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
92 #define PSTATE_UAO pstate_field(0, 3)
93 #define PSTATE_SSBS pstate_field(3, 1)
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/openbmc/linux/drivers/comedi/drivers/ni_routing/ni_device_routes/
H A Dpxie-6535.c1 // SPDX-License-Identifier: GPL-2.0+
3 * comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c
6 * COMEDI - Linux Control and Measurement Device Interface
31 .device = "pxie-6535",
38 NI_PFI(3),
40 NI_PFI(5),
44 TRIGGER_LINE(3),
46 TRIGGER_LINE(5),
68 NI_PFI(3),
70 NI_PFI(5),
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/openbmc/linux/arch/alpha/kernel/
H A Dtraps.c1 // SPDX-License-Identifier: GPL-2.0
32 /* Work-around for some SRMs which mishandle opDEC faults. */
49 "1: lda $17, 3\n" in opDEC_check()
51 /* With that in place, the fault from the round-to-minf fp in opDEC_check()
69 regs->pc, regs->r26, regs->ps, print_tainted()); in dik_show_regs()
70 printk("pc is at %pSR\n", (void *)regs->pc); in dik_show_regs()
71 printk("ra is at %pSR\n", (void *)regs->r26); in dik_show_regs()
73 regs->r0, regs->r1, regs->r2); in dik_show_regs()
75 regs->r3, regs->r4, regs->r5); in dik_show_regs()
77 regs->r6, regs->r7, regs->r8); in dik_show_regs()
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/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dsh_mobile_ceu_camera.rst1 .. SPDX-License-Identifier: GPL-2.0
9 -----------
12 host scales: -"- host driver
17 ---------------------------------
19 .. code-block:: none
21 -1--
23 -2-- -\
24 | --\
25 | --\
26 +-5-- . -- -3-- -\
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/openbmc/linux/sound/soc/codecs/
H A Des8328.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * es8328.h -- ES8328 ALSA SoC Audio driver
25 #define ES8328_CONTROL1_VMIDSEL_5k (3 << 0)
26 #define ES8328_CONTROL1_VMIDSEL_MASK (3 << 0)
28 #define ES8328_CONTROL1_SEQEN (1 << 3)
30 #define ES8328_CONTROL1_DACMCLK_ADC (0 << 5)
31 #define ES8328_CONTROL1_DACMCLK_DAC (1 << 5)
39 #define ES8328_CONTROL2_ANALOG_OFF (1 << 3)
41 #define ES8328_CONTROL2_VCM_MOD_LOWPOWER (1 << 5)
49 #define ES8328_CHIPPOWER_ADCDLL_OFF 3
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H A Dmax98925.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * max98925.h -- MAX98925 ALSA SoC Audio driver
5 * Copyright 2013-2015 Maxim Integrated Products
78 #define M98925_THERMWARN_STATUS_MASK (1<<3)
79 #define M98925_THERMWARN_STATUS_SHIFT 3
86 #define M98925_SPKCURNT_STATUS_MASK (1<<5)
87 #define M98925_SPKCURNT_STATUS_SHIFT 5
92 #define M98925_ALCINFH_STATUS_MASK (1<<3)
93 #define M98925_ALCINFH_STATUS_SHIFT 3
109 #define M98925_INVALSLOT_STATUS_MASK (1<<5)
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H A Dmax98926.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * max98926.h -- MAX98926 ALSA SoC Audio driver
4 * Copyright 2013-2015 Maxim Integrated Products
77 #define MAX98926_PDM_VOLTAGE_MASK (1<<3)
78 #define MAX98926_PDM_VOLTAGE_SHIFT 3
83 #define MAX98926_PDM_CHANNEL_1_HIZ 5
93 #define MAX98926_THERMWARN_STATUS_MASK (1<<3)
94 #define MAX98926_THERMWARN_STATUS_SHIFT 3
101 #define MAX98926_SPKCURNT_STATUS_MASK (1<<5)
102 #define MAX98926_SPKCURNT_STATUS_SHIFT 5
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/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dget-reg-list.c1 // SPDX-License-Identifier: GPL-2.0
27 ARM64_SYS_REG(3, 0, 2, 0, 3), /* TCR2_EL1 */
28 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
33 ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */
34 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
39 ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */
40 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
93 if (s->finalize) { in finalize_vcpu()
94 feature = s->feature; in finalize_vcpu()
116 idx = (core_off - KVM_REG_ARM_CORE_REG(regs.regs[0])) / CORE_REGS_XX_NR_WORDS; in core_id_to_str()
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