1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2567e4f98SSean Cross /* 3567e4f98SSean Cross * es8328.h -- ES8328 ALSA SoC Audio driver 4567e4f98SSean Cross */ 5567e4f98SSean Cross 6567e4f98SSean Cross #ifndef _ES8328_H 7567e4f98SSean Cross #define _ES8328_H 8567e4f98SSean Cross 9567e4f98SSean Cross #include <linux/regmap.h> 10567e4f98SSean Cross 11567e4f98SSean Cross struct device; 12567e4f98SSean Cross 13567e4f98SSean Cross extern const struct regmap_config es8328_regmap_config; 14567e4f98SSean Cross int es8328_probe(struct device *dev, struct regmap *regmap); 15567e4f98SSean Cross 16567e4f98SSean Cross #define ES8328_DACLVOL 46 17567e4f98SSean Cross #define ES8328_DACRVOL 47 18567e4f98SSean Cross #define ES8328_DACCTL 28 19567e4f98SSean Cross #define ES8328_RATEMASK (0x1f << 0) 20567e4f98SSean Cross 21567e4f98SSean Cross #define ES8328_CONTROL1 0x00 22567e4f98SSean Cross #define ES8328_CONTROL1_VMIDSEL_OFF (0 << 0) 23567e4f98SSean Cross #define ES8328_CONTROL1_VMIDSEL_50k (1 << 0) 24567e4f98SSean Cross #define ES8328_CONTROL1_VMIDSEL_500k (2 << 0) 25567e4f98SSean Cross #define ES8328_CONTROL1_VMIDSEL_5k (3 << 0) 262da1ab66SJohn Keeping #define ES8328_CONTROL1_VMIDSEL_MASK (3 << 0) 27567e4f98SSean Cross #define ES8328_CONTROL1_ENREF (1 << 2) 28567e4f98SSean Cross #define ES8328_CONTROL1_SEQEN (1 << 3) 29567e4f98SSean Cross #define ES8328_CONTROL1_SAMEFS (1 << 4) 30567e4f98SSean Cross #define ES8328_CONTROL1_DACMCLK_ADC (0 << 5) 31567e4f98SSean Cross #define ES8328_CONTROL1_DACMCLK_DAC (1 << 5) 32567e4f98SSean Cross #define ES8328_CONTROL1_LRCM (1 << 6) 33567e4f98SSean Cross #define ES8328_CONTROL1_SCP_RESET (1 << 7) 34567e4f98SSean Cross 35567e4f98SSean Cross #define ES8328_CONTROL2 0x01 36567e4f98SSean Cross #define ES8328_CONTROL2_VREF_BUF_OFF (1 << 0) 37567e4f98SSean Cross #define ES8328_CONTROL2_VREF_LOWPOWER (1 << 1) 38567e4f98SSean Cross #define ES8328_CONTROL2_IBIASGEN_OFF (1 << 2) 39567e4f98SSean Cross #define ES8328_CONTROL2_ANALOG_OFF (1 << 3) 40567e4f98SSean Cross #define ES8328_CONTROL2_VREF_BUF_LOWPOWER (1 << 4) 41567e4f98SSean Cross #define ES8328_CONTROL2_VCM_MOD_LOWPOWER (1 << 5) 42567e4f98SSean Cross #define ES8328_CONTROL2_OVERCURRENT_ON (1 << 6) 43567e4f98SSean Cross #define ES8328_CONTROL2_THERMAL_SHUTDOWN_ON (1 << 7) 44567e4f98SSean Cross 45567e4f98SSean Cross #define ES8328_CHIPPOWER 0x02 46567e4f98SSean Cross #define ES8328_CHIPPOWER_DACVREF_OFF 0 47567e4f98SSean Cross #define ES8328_CHIPPOWER_ADCVREF_OFF 1 48567e4f98SSean Cross #define ES8328_CHIPPOWER_DACDLL_OFF 2 49567e4f98SSean Cross #define ES8328_CHIPPOWER_ADCDLL_OFF 3 50567e4f98SSean Cross #define ES8328_CHIPPOWER_DACSTM_RESET 4 51567e4f98SSean Cross #define ES8328_CHIPPOWER_ADCSTM_RESET 5 52567e4f98SSean Cross #define ES8328_CHIPPOWER_DACDIG_OFF 6 53567e4f98SSean Cross #define ES8328_CHIPPOWER_ADCDIG_OFF 7 54567e4f98SSean Cross 55567e4f98SSean Cross #define ES8328_ADCPOWER 0x03 56567e4f98SSean Cross #define ES8328_ADCPOWER_INT1_LOWPOWER 0 57567e4f98SSean Cross #define ES8328_ADCPOWER_FLASH_ADC_LOWPOWER 1 58567e4f98SSean Cross #define ES8328_ADCPOWER_ADC_BIAS_GEN_OFF 2 59567e4f98SSean Cross #define ES8328_ADCPOWER_MIC_BIAS_OFF 3 60567e4f98SSean Cross #define ES8328_ADCPOWER_ADCR_OFF 4 61567e4f98SSean Cross #define ES8328_ADCPOWER_ADCL_OFF 5 62567e4f98SSean Cross #define ES8328_ADCPOWER_AINR_OFF 6 63567e4f98SSean Cross #define ES8328_ADCPOWER_AINL_OFF 7 64567e4f98SSean Cross 65567e4f98SSean Cross #define ES8328_DACPOWER 0x04 66567e4f98SSean Cross #define ES8328_DACPOWER_OUT3_ON 0 67567e4f98SSean Cross #define ES8328_DACPOWER_MONO_ON 1 68567e4f98SSean Cross #define ES8328_DACPOWER_ROUT2_ON 2 69567e4f98SSean Cross #define ES8328_DACPOWER_LOUT2_ON 3 70567e4f98SSean Cross #define ES8328_DACPOWER_ROUT1_ON 4 71567e4f98SSean Cross #define ES8328_DACPOWER_LOUT1_ON 5 72567e4f98SSean Cross #define ES8328_DACPOWER_RDAC_OFF 6 73567e4f98SSean Cross #define ES8328_DACPOWER_LDAC_OFF 7 74567e4f98SSean Cross 75567e4f98SSean Cross #define ES8328_CHIPLOPOW1 0x05 76567e4f98SSean Cross #define ES8328_CHIPLOPOW2 0x06 77567e4f98SSean Cross #define ES8328_ANAVOLMANAG 0x07 78567e4f98SSean Cross 79567e4f98SSean Cross #define ES8328_MASTERMODE 0x08 80567e4f98SSean Cross #define ES8328_MASTERMODE_BCLKDIV (0 << 0) 81567e4f98SSean Cross #define ES8328_MASTERMODE_BCLK_INV (1 << 5) 82567e4f98SSean Cross #define ES8328_MASTERMODE_MCLKDIV2 (1 << 6) 83567e4f98SSean Cross #define ES8328_MASTERMODE_MSC (1 << 7) 84567e4f98SSean Cross 85567e4f98SSean Cross #define ES8328_ADCCONTROL1 0x09 86567e4f98SSean Cross #define ES8328_ADCCONTROL2 0x0a 87567e4f98SSean Cross #define ES8328_ADCCONTROL3 0x0b 8857e41f3fSJohn Keeping 89567e4f98SSean Cross #define ES8328_ADCCONTROL4 0x0c 908865c95eSJohn Keeping #define ES8328_ADCCONTROL4_ADCFORMAT_MASK (3 << 0) 9157e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCFORMAT_I2S (0 << 0) 9257e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) 9357e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) 9457e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) 95779e86a3SJohn Keeping #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2 968865c95eSJohn Keeping #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) 9757e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) 9857e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) 9957e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK2 (0 << 5) 10057e41f3fSJohn Keeping #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK1 (1 << 5) 10157e41f3fSJohn Keeping 102567e4f98SSean Cross #define ES8328_ADCCONTROL5 0x0d 103567e4f98SSean Cross #define ES8328_ADCCONTROL5_RATEMASK (0x1f << 0) 104567e4f98SSean Cross 105567e4f98SSean Cross #define ES8328_ADCCONTROL6 0x0e 106567e4f98SSean Cross 107567e4f98SSean Cross #define ES8328_ADCCONTROL7 0x0f 108567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_MUTE (1 << 2) 109567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_LER (1 << 3) 110567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_ZERO_CROSS (1 << 4) 111567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_SOFT_RAMP (1 << 5) 112567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_4 (0 << 6) 113567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_8 (1 << 6) 114567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_16 (2 << 6) 115567e4f98SSean Cross #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_32 (3 << 6) 116567e4f98SSean Cross 117567e4f98SSean Cross #define ES8328_ADCCONTROL8 0x10 118567e4f98SSean Cross #define ES8328_ADCCONTROL9 0x11 119567e4f98SSean Cross #define ES8328_ADCCONTROL10 0x12 120567e4f98SSean Cross #define ES8328_ADCCONTROL11 0x13 121567e4f98SSean Cross #define ES8328_ADCCONTROL12 0x14 122567e4f98SSean Cross #define ES8328_ADCCONTROL13 0x15 123567e4f98SSean Cross #define ES8328_ADCCONTROL14 0x16 124567e4f98SSean Cross 125567e4f98SSean Cross #define ES8328_DACCONTROL1 0x17 1268865c95eSJohn Keeping #define ES8328_DACCONTROL1_DACFORMAT_MASK (3 << 1) 127567e4f98SSean Cross #define ES8328_DACCONTROL1_DACFORMAT_I2S (0 << 1) 128567e4f98SSean Cross #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) 129567e4f98SSean Cross #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) 130567e4f98SSean Cross #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) 131779e86a3SJohn Keeping #define ES8328_DACCONTROL1_DACWL_SHIFT 3 1328865c95eSJohn Keeping #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) 133567e4f98SSean Cross #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) 134567e4f98SSean Cross #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) 135567e4f98SSean Cross #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK2 (0 << 6) 136567e4f98SSean Cross #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK1 (1 << 6) 137567e4f98SSean Cross #define ES8328_DACCONTROL1_LRSWAP (1 << 7) 138567e4f98SSean Cross 139567e4f98SSean Cross #define ES8328_DACCONTROL2 0x18 140567e4f98SSean Cross #define ES8328_DACCONTROL2_RATEMASK (0x1f << 0) 141567e4f98SSean Cross #define ES8328_DACCONTROL2_DOUBLESPEED (1 << 5) 142567e4f98SSean Cross 143567e4f98SSean Cross #define ES8328_DACCONTROL3 0x19 144567e4f98SSean Cross #define ES8328_DACCONTROL3_AUTOMUTE (1 << 2) 145567e4f98SSean Cross #define ES8328_DACCONTROL3_DACMUTE (1 << 2) 146567e4f98SSean Cross #define ES8328_DACCONTROL3_LEFTGAINVOL (1 << 3) 147567e4f98SSean Cross #define ES8328_DACCONTROL3_DACZEROCROSS (1 << 4) 148567e4f98SSean Cross #define ES8328_DACCONTROL3_DACSOFTRAMP (1 << 5) 149567e4f98SSean Cross #define ES8328_DACCONTROL3_DACRAMPRATE (3 << 6) 150567e4f98SSean Cross 151567e4f98SSean Cross #define ES8328_LDACVOL 0x1a 152567e4f98SSean Cross #define ES8328_LDACVOL_MASK (0 << 0) 153567e4f98SSean Cross #define ES8328_LDACVOL_MAX (0xc0) 154567e4f98SSean Cross 155567e4f98SSean Cross #define ES8328_RDACVOL 0x1b 156567e4f98SSean Cross #define ES8328_RDACVOL_MASK (0 << 0) 157567e4f98SSean Cross #define ES8328_RDACVOL_MAX (0xc0) 158567e4f98SSean Cross 159567e4f98SSean Cross #define ES8328_DACVOL_MAX (0xc0) 160567e4f98SSean Cross 161567e4f98SSean Cross #define ES8328_DACCONTROL4 0x1a 162567e4f98SSean Cross #define ES8328_DACCONTROL5 0x1b 163567e4f98SSean Cross 164567e4f98SSean Cross #define ES8328_DACCONTROL6 0x1c 165567e4f98SSean Cross #define ES8328_DACCONTROL6_CLICKFREE (1 << 3) 166567e4f98SSean Cross #define ES8328_DACCONTROL6_DAC_INVR (1 << 4) 167567e4f98SSean Cross #define ES8328_DACCONTROL6_DAC_INVL (1 << 5) 16884ebac4dSJohn Keeping #define ES8328_DACCONTROL6_DEEMPH_MASK (3 << 6) 169567e4f98SSean Cross #define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6) 170567e4f98SSean Cross #define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6) 171567e4f98SSean Cross #define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6) 172567e4f98SSean Cross #define ES8328_DACCONTROL6_DEEMPH_48k (3 << 6) 173567e4f98SSean Cross 174567e4f98SSean Cross #define ES8328_DACCONTROL7 0x1d 175567e4f98SSean Cross #define ES8328_DACCONTROL7_VPP_SCALE_3p5 (0 << 0) 176567e4f98SSean Cross #define ES8328_DACCONTROL7_VPP_SCALE_4p0 (1 << 0) 177567e4f98SSean Cross #define ES8328_DACCONTROL7_VPP_SCALE_3p0 (2 << 0) 178567e4f98SSean Cross #define ES8328_DACCONTROL7_VPP_SCALE_2p5 (3 << 0) 179567e4f98SSean Cross #define ES8328_DACCONTROL7_SHELVING_STRENGTH (1 << 2) /* In eights */ 180567e4f98SSean Cross #define ES8328_DACCONTROL7_MONO (1 << 5) 181567e4f98SSean Cross #define ES8328_DACCONTROL7_ZEROR (1 << 6) 182567e4f98SSean Cross #define ES8328_DACCONTROL7_ZEROL (1 << 7) 183567e4f98SSean Cross 184567e4f98SSean Cross /* Shelving filter */ 185567e4f98SSean Cross #define ES8328_DACCONTROL8 0x1e 186567e4f98SSean Cross #define ES8328_DACCONTROL9 0x1f 187567e4f98SSean Cross #define ES8328_DACCONTROL10 0x20 188567e4f98SSean Cross #define ES8328_DACCONTROL11 0x21 189567e4f98SSean Cross #define ES8328_DACCONTROL12 0x22 190567e4f98SSean Cross #define ES8328_DACCONTROL13 0x23 191567e4f98SSean Cross #define ES8328_DACCONTROL14 0x24 192567e4f98SSean Cross #define ES8328_DACCONTROL15 0x25 193567e4f98SSean Cross 194567e4f98SSean Cross #define ES8328_DACCONTROL16 0x26 195567e4f98SSean Cross #define ES8328_DACCONTROL16_RMIXSEL_RIN1 (0 << 0) 196567e4f98SSean Cross #define ES8328_DACCONTROL16_RMIXSEL_RIN2 (1 << 0) 197567e4f98SSean Cross #define ES8328_DACCONTROL16_RMIXSEL_RIN3 (2 << 0) 198567e4f98SSean Cross #define ES8328_DACCONTROL16_RMIXSEL_RADC (3 << 0) 199567e4f98SSean Cross #define ES8328_DACCONTROL16_LMIXSEL_LIN1 (0 << 3) 200567e4f98SSean Cross #define ES8328_DACCONTROL16_LMIXSEL_LIN2 (1 << 3) 201567e4f98SSean Cross #define ES8328_DACCONTROL16_LMIXSEL_LIN3 (2 << 3) 202567e4f98SSean Cross #define ES8328_DACCONTROL16_LMIXSEL_LADC (3 << 3) 203567e4f98SSean Cross 204567e4f98SSean Cross #define ES8328_DACCONTROL17 0x27 205567e4f98SSean Cross #define ES8328_DACCONTROL17_LI2LOVOL (7 << 3) 206567e4f98SSean Cross #define ES8328_DACCONTROL17_LI2LO (1 << 6) 207567e4f98SSean Cross #define ES8328_DACCONTROL17_LD2LO (1 << 7) 208567e4f98SSean Cross 209567e4f98SSean Cross #define ES8328_DACCONTROL18 0x28 210567e4f98SSean Cross #define ES8328_DACCONTROL18_RI2LOVOL (7 << 3) 211567e4f98SSean Cross #define ES8328_DACCONTROL18_RI2LO (1 << 6) 212567e4f98SSean Cross #define ES8328_DACCONTROL18_RD2LO (1 << 7) 213567e4f98SSean Cross 214567e4f98SSean Cross #define ES8328_DACCONTROL19 0x29 215567e4f98SSean Cross #define ES8328_DACCONTROL19_LI2ROVOL (7 << 3) 216567e4f98SSean Cross #define ES8328_DACCONTROL19_LI2RO (1 << 6) 217567e4f98SSean Cross #define ES8328_DACCONTROL19_LD2RO (1 << 7) 218567e4f98SSean Cross 219567e4f98SSean Cross #define ES8328_DACCONTROL20 0x2a 220567e4f98SSean Cross #define ES8328_DACCONTROL20_RI2ROVOL (7 << 3) 221567e4f98SSean Cross #define ES8328_DACCONTROL20_RI2RO (1 << 6) 222567e4f98SSean Cross #define ES8328_DACCONTROL20_RD2RO (1 << 7) 223567e4f98SSean Cross 224567e4f98SSean Cross #define ES8328_DACCONTROL21 0x2b 225567e4f98SSean Cross #define ES8328_DACCONTROL21_LI2MOVOL (7 << 3) 226567e4f98SSean Cross #define ES8328_DACCONTROL21_LI2MO (1 << 6) 227567e4f98SSean Cross #define ES8328_DACCONTROL21_LD2MO (1 << 7) 228567e4f98SSean Cross 229567e4f98SSean Cross #define ES8328_DACCONTROL22 0x2c 230567e4f98SSean Cross #define ES8328_DACCONTROL22_RI2MOVOL (7 << 3) 231567e4f98SSean Cross #define ES8328_DACCONTROL22_RI2MO (1 << 6) 232567e4f98SSean Cross #define ES8328_DACCONTROL22_RD2MO (1 << 7) 233567e4f98SSean Cross 234567e4f98SSean Cross #define ES8328_DACCONTROL23 0x2d 235567e4f98SSean Cross #define ES8328_DACCONTROL23_MOUTINV (1 << 1) 236567e4f98SSean Cross #define ES8328_DACCONTROL23_HPSWPOL (1 << 2) 237567e4f98SSean Cross #define ES8328_DACCONTROL23_HPSWEN (1 << 3) 238567e4f98SSean Cross #define ES8328_DACCONTROL23_VROI_1p5k (0 << 4) 239567e4f98SSean Cross #define ES8328_DACCONTROL23_VROI_40k (1 << 4) 240567e4f98SSean Cross #define ES8328_DACCONTROL23_OUT3_VREF (0 << 5) 241567e4f98SSean Cross #define ES8328_DACCONTROL23_OUT3_ROUT1 (1 << 5) 242567e4f98SSean Cross #define ES8328_DACCONTROL23_OUT3_MONOOUT (2 << 5) 243567e4f98SSean Cross #define ES8328_DACCONTROL23_OUT3_RIGHT_MIXER (3 << 5) 244567e4f98SSean Cross #define ES8328_DACCONTROL23_ROUT2INV (1 << 7) 245567e4f98SSean Cross 246567e4f98SSean Cross /* LOUT1 Amplifier */ 247567e4f98SSean Cross #define ES8328_LOUT1VOL 0x2e 248567e4f98SSean Cross #define ES8328_LOUT1VOL_MASK (0 << 5) 249567e4f98SSean Cross #define ES8328_LOUT1VOL_MAX (0x24) 250567e4f98SSean Cross 251567e4f98SSean Cross /* ROUT1 Amplifier */ 252567e4f98SSean Cross #define ES8328_ROUT1VOL 0x2f 253567e4f98SSean Cross #define ES8328_ROUT1VOL_MASK (0 << 5) 254567e4f98SSean Cross #define ES8328_ROUT1VOL_MAX (0x24) 255567e4f98SSean Cross 256567e4f98SSean Cross #define ES8328_OUT1VOL_MAX (0x24) 257567e4f98SSean Cross 258567e4f98SSean Cross /* LOUT2 Amplifier */ 259567e4f98SSean Cross #define ES8328_LOUT2VOL 0x30 260567e4f98SSean Cross #define ES8328_LOUT2VOL_MASK (0 << 5) 261567e4f98SSean Cross #define ES8328_LOUT2VOL_MAX (0x24) 262567e4f98SSean Cross 263567e4f98SSean Cross /* ROUT2 Amplifier */ 264567e4f98SSean Cross #define ES8328_ROUT2VOL 0x31 265567e4f98SSean Cross #define ES8328_ROUT2VOL_MASK (0 << 5) 266567e4f98SSean Cross #define ES8328_ROUT2VOL_MAX (0x24) 267567e4f98SSean Cross 268567e4f98SSean Cross #define ES8328_OUT2VOL_MAX (0x24) 269567e4f98SSean Cross 270567e4f98SSean Cross /* Mono Out Amplifier */ 271567e4f98SSean Cross #define ES8328_MONOOUTVOL 0x32 272567e4f98SSean Cross #define ES8328_MONOOUTVOL_MASK (0 << 5) 273567e4f98SSean Cross #define ES8328_MONOOUTVOL_MAX (0x24) 274567e4f98SSean Cross 275567e4f98SSean Cross #define ES8328_DACCONTROL29 0x33 276567e4f98SSean Cross #define ES8328_DACCONTROL30 0x34 277567e4f98SSean Cross 278567e4f98SSean Cross #define ES8328_SYSCLK 0 279567e4f98SSean Cross 280567e4f98SSean Cross #define ES8328_REG_MAX 0x35 281567e4f98SSean Cross 282567e4f98SSean Cross #define ES8328_1536FS 1536 283567e4f98SSean Cross #define ES8328_1024FS 1024 284567e4f98SSean Cross #define ES8328_768FS 768 285567e4f98SSean Cross #define ES8328_512FS 512 286567e4f98SSean Cross #define ES8328_384FS 384 287567e4f98SSean Cross #define ES8328_256FS 256 288567e4f98SSean Cross #define ES8328_128FS 128 289567e4f98SSean Cross 290567e4f98SSean Cross #endif 291