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/openbmc/linux/arch/mips/boot/dts/qca/
H A Dar9132_tl_wr1043nd_v1.dts13 memory@0 {
15 reg = <0x0 0x2000000>;
20 #clock-cells = <0>;
27 button-0 {
44 led-0 {
87 flash@0 {
91 reg = <0>;
94 partition@0 {
96 reg = <0x000000 0x020000>;
101 reg = <0x020000 0x7D0000>;
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Dhardware.h21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
41 * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
43 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
44 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
45 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
47 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
48 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
51 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
[all …]
/openbmc/u-boot/board/ti/am335x/
H A DREADME68 U-Boot # load mmc 0 0x82000000 MLO
69 U-Boot # nand write 0x82000000 0x00000 0x20000
70 U-Boot # nand write 0x82000000 0x20000 0x20000
71 U-Boot # nand write 0x82000000 0x40000 0x20000
72 U-Boot # nand write 0x82000000 0x60000 0x20000
74 U-Boot # load mmc 0 0x82000000 u-boot.img
75 U-Boot # nand write 0x82000000 0x80000 0x60000
77 U-Boot # load mmc 0 0x82000000 uImage
78 U-Boot # nand write 0x82000000 ${nandsrcaddr} ${nandimgsize}
80 U-Boot # load mmc 0 0x82000000 filesystem.img
[all …]
/openbmc/u-boot/drivers/dma/
H A Dfsl_dma.c17 #define FSL_DMA_MAX_SIZE (0x3ffffff)
64 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_check()
76 if (status != 0) in dma_check()
84 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dma_init()
88 out_dma32(&dma->sr, 0xffffffff); /* clear any errors */ in dma_init()
94 volatile fsl_dma_t *dma = &dma_base->dma[0]; in dmacpy()
100 out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); in dmacpy()
101 out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); in dmacpy()
128 return 0; in dmacpy()
140 uint *p = 0; in dma_meminit()
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-agn-hw.h12 #define IWLAGN_RTC_INST_LOWER_BOUND (0x000000)
13 #define IWLAGN_RTC_INST_UPPER_BOUND (0x020000)
15 #define IWLAGN_RTC_DATA_LOWER_BOUND (0x800000)
16 #define IWLAGN_RTC_DATA_UPPER_BOUND (0x80C000)
23 #define IWL60_RTC_INST_LOWER_BOUND (0x000000)
24 #define IWL60_RTC_INST_UPPER_BOUND (0x040000)
25 #define IWL60_RTC_DATA_LOWER_BOUND (0x800000)
26 #define IWL60_RTC_DATA_UPPER_BOUND (0x814000)
42 #define IWLAGN_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm: 1 milliwatt */
50 #define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */
/openbmc/u-boot/arch/arm/dts/
H A Dda850-lcdk.dts25 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
26 reg = <0xc0000000 0x08000000>;
36 reg = <0xc3000000 0x1000000>;
89 #size-cells = <0>;
93 #size-cells = <0>;
95 port@0 {
96 reg = <0>;
136 0x00 0x00101010 0x00f0f0f0
138 0x04 0x00000110 0x00000ff0
144 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
[all …]
/openbmc/linux/Documentation/hwmon/
H A Dw83791d.rst10 Addresses scanned: I2C 0x2c - 0x2f
40 (default 0)
49 (default 0)
51 Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default
56 a certain chip. Example usage is `force_subclients=0,0x2f,0x4a,0x4b`
57 to force the subclients of chip 0x2f on bus 0 to i2c addresses
58 0x4a and 0x4b.
90 set for each fan separately. Valid values range from 0 (stop) to 255 (full).
157 in0 (VCORE) 0x000001 0x000001
158 in1 (VINR0) 0x000002 0x002000 <== mismatch
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dsp810.yaml70 reg = <0x020000 0x1000>;
76 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>,
/openbmc/qemu/linux-user/generic/
H A Dtarget_mman.h5 #define TARGET_MAP_SHARED 0x01
6 #define TARGET_MAP_PRIVATE 0x02
7 #define TARGET_MAP_SHARED_VALIDATE 0x03
9 /* 0x0100 - 0x4000 flags are defined in asm-generic/mman.h */
11 #define TARGET_MAP_GROWSDOWN 0x0100
14 #define TARGET_MAP_DENYWRITE 0x0800
17 #define TARGET_MAP_EXECUTABLE 0x1000
20 #define TARGET_MAP_LOCKED 0x2000
23 #define TARGET_MAP_NORESERVE 0x4000
28 #define TARGET_PROT_SEM 0x08
[all …]
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8-acm.c130 … IMX_ADMA_ACM_AUD_CLK0_SEL, imx8qm_aud_clk_sels, ARRAY_SIZE(imx8qm_aud_clk_sels), 0x000000, 0, 5 },
131 … IMX_ADMA_ACM_AUD_CLK1_SEL, imx8qm_aud_clk_sels, ARRAY_SIZE(imx8qm_aud_clk_sels), 0x010000, 0, 5 },
132 …MX_ADMA_ACM_MCLKOUT0_SEL, imx8qm_mclk_out_sels, ARRAY_SIZE(imx8qm_mclk_out_sels), 0x020000, 0, 3 },
133 …MX_ADMA_ACM_MCLKOUT1_SEL, imx8qm_mclk_out_sels, ARRAY_SIZE(imx8qm_mclk_out_sels), 0x030000, 0, 3 },
134 …SRC0_MUX_CLK_SEL, imx8qm_asrc_mux_clk_sels, ARRAY_SIZE(imx8qm_asrc_mux_clk_sels), 0x040000, 0, 2 },
135 …el", IMX_ADMA_ACM_ESAI0_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x060000, 0, 2 },
136 …el", IMX_ADMA_ACM_ESAI1_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x070000, 0, 2 },
137 …sel", IMX_ADMA_ACM_SAI0_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x0E0000, 0, 2 },
138 …sel", IMX_ADMA_ACM_SAI1_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x0F0000, 0, 2 },
139 …sel", IMX_ADMA_ACM_SAI2_MCLK_SEL, imx8qm_mclk_sels, ARRAY_SIZE(imx8qm_mclk_sels), 0x100000, 0, 2 },
[all …]
/openbmc/linux/drivers/mtd/maps/
H A Dts5500_flash.c23 #define WINDOW_ADDR 0x09400000
24 #define WINDOW_SIZE 0x00200000
36 .offset = 0,
37 .size = 0x0e0000
41 .offset = 0x0e0000,
42 .size = 0x020000,
46 .offset = 0x100000,
47 .size = 0x100000
57 int rc = 0; in init_ts5500_map()
81 return 0; in init_ts5500_map()
H A Dcfi_flagadm.c36 * 1: bootloader first 128k (0x00000000 - 0x0001FFFF) size 0x020000
37 * 2: kernel 640k (0x00020000 - 0x000BFFFF) size 0x0A0000
38 * 3: compressed 1536k root ramdisk (0x000C0000 - 0x0023FFFF) size 0x180000
39 * 4: writeable diskpartition (jffs)(0x00240000 - 0x003FFFFF) size 0x1C0000
42 #define FLASH_PHYS_ADDR 0x40000000
43 #define FLASH_SIZE 0x400000
45 #define FLASH_PARTITION0_ADDR 0x00000000
46 #define FLASH_PARTITION0_SIZE 0x00020000
48 #define FLASH_PARTITION1_ADDR 0x00020000
49 #define FLASH_PARTITION1_SIZE 0x000A0000
[all …]
/openbmc/u-boot/include/configs/
H A Ddisplay5.h14 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
18 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x3F00
21 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x100 /* 128KiB */
29 * 0x000000 - 0x020000 : SPI.SPL (128KiB)
30 * 0x020000 - 0x120000 : SPI.u-boot (1MiB)
31 * 0x120000 - 0x130000 : SPI.u-boot-env1 (64KiB)
32 * 0x130000 - 0x140000 : SPI.u-boot-env2 (64KiB)
33 * 0x140000 - 0x540000 : SPI.swupdate-kernel-FIT (4MiB)
34 * 0x540000 - 0x1540000 : SPI.swupdate-initramfs (16MiB)
35 * 0x1540000 - 0x1640000 : SPI.factory (1MiB)
[all …]
H A Dam335x_evm.h42 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
43 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
47 "rootfstype=${nandrootfstype}\0" \
48 "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
49 "nandrootfstype=ubifs rootwait=1\0" \
54 "bootz ${loadaddr} - ${fdtaddr}\0"
63 "run mmcboot\0"
70 "run nandboot\0"
88 func(MMC, mmc, 0) \
89 func(LEGACY_MMC, legacy_mmc, 0) \
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-lcdk.dts24 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
25 reg = <0xc0000000 0x08000000>;
35 reg = <0xc3000000 0x1000000>;
122 #size-cells = <0>;
126 #size-cells = <0>;
128 port@0 {
129 reg = <0>;
205 0x00 0x00101010 0x00f0f0f0
207 0x04 0x00000110 0x00000ff0
213 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
[all …]
/openbmc/u-boot/include/
H A Dfsl_pmic.h21 REG_INT_STATUS0 = 0,
101 /* Power Control 0 */
109 #define SWx_VOLT_MASK_MC34708 0x3F
110 #define SWx_1_110V_MC34708 0x24
111 #define SWx_1_250V_MC34708 0x30
112 #define SWx_1_300V_MC34708 0x34
113 #define TIMER_MASK_MC34708 0x300
114 #define TIMER_4S_MC34708 0x100
118 #define SWBST_AUTO 0x8
122 #define MC34708_SW1AMODE_MASK 0x00000f
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgk104.c37 const u32 hoff = head * 0x400; in gk104_sor_hdmi_infoframe_vsi()
42 nvkm_mask(device, 0x690100 + hoff, 0x00010001, 0x00000000); in gk104_sor_hdmi_infoframe_vsi()
46 nvkm_wr32(device, 0x690108 + hoff, vsi.header); in gk104_sor_hdmi_infoframe_vsi()
47 nvkm_wr32(device, 0x69010c + hoff, vsi.subpack0_low); in gk104_sor_hdmi_infoframe_vsi()
48 nvkm_wr32(device, 0x690110 + hoff, vsi.subpack0_high); in gk104_sor_hdmi_infoframe_vsi()
50 nvkm_mask(device, 0x690100 + hoff, 0x00000001, 0x00000001); in gk104_sor_hdmi_infoframe_vsi()
58 const u32 hoff = head * 0x400; in gk104_sor_hdmi_infoframe_avi()
63 nvkm_mask(device, 0x690000 + hoff, 0x00000001, 0x00000000); in gk104_sor_hdmi_infoframe_avi()
67 nvkm_wr32(device, 0x690008 + hoff, avi.header); in gk104_sor_hdmi_infoframe_avi()
68 nvkm_wr32(device, 0x69000c + hoff, avi.subpack0_low); in gk104_sor_hdmi_infoframe_avi()
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Damigayle.h25 #define GAYLE_RAM (0x600000+zTwoBase)
26 #define GAYLE_RAMSIZE (0x400000)
27 #define GAYLE_ATTRIBUTE (0xa00000+zTwoBase)
28 #define GAYLE_ATTRIBUTESIZE (0x020000)
29 #define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */
30 #define GAYLE_IOSIZE (0x010000)
31 #define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */
40 u_char pad0[0x1000-1];
43 u_char pad1[0x1000-1];
46 u_char pad2[0x1000-1];
[all …]
/openbmc/linux/arch/powerpc/include/asm/nohash/
H A Dpte-e500.h13 #define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
14 #define _PAGE_SW1 0x000002
15 #define _PAGE_BAP_SR 0x000004
16 #define _PAGE_BAP_UR 0x000008
17 #define _PAGE_BAP_SW 0x000010
18 #define _PAGE_BAP_UW 0x000020
19 #define _PAGE_BAP_SX 0x000040
20 #define _PAGE_BAP_UX 0x000080
21 #define _PAGE_PSIZE_MSK 0x000f00
22 #define _PAGE_PSIZE_4K 0x000200
[all …]
/openbmc/linux/tools/include/uapi/asm-generic/
H A Dmman-common.h10 #define PROT_READ 0x1 /* page can be read */
11 #define PROT_WRITE 0x2 /* page can be written */
12 #define PROT_EXEC 0x4 /* page can be executed */
13 #define PROT_SEM 0x8 /* page may be used for atomic ops */
14 /* 0x10 reserved for arch-specific use */
15 /* 0x20 reserved for arch-specific use */
16 #define PROT_NONE 0x0 /* page can not be accessed */
17 #define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
18 #define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
20 /* 0x01 - 0x03 are defined in linux/mman.h */
[all …]
/openbmc/linux/include/uapi/asm-generic/
H A Dmman-common.h10 #define PROT_READ 0x1 /* page can be read */
11 #define PROT_WRITE 0x2 /* page can be written */
12 #define PROT_EXEC 0x4 /* page can be executed */
13 #define PROT_SEM 0x8 /* page may be used for atomic ops */
14 /* 0x10 reserved for arch-specific use */
15 /* 0x20 reserved for arch-specific use */
16 #define PROT_NONE 0x0 /* page can not be accessed */
17 #define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
18 #define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
20 /* 0x01 - 0x03 are defined in linux/mman.h */
[all …]
/openbmc/qemu/linux-headers/asm-generic/
H A Dmman-common.h10 #define PROT_READ 0x1 /* page can be read */
11 #define PROT_WRITE 0x2 /* page can be written */
12 #define PROT_EXEC 0x4 /* page can be executed */
13 #define PROT_SEM 0x8 /* page may be used for atomic ops */
14 /* 0x10 reserved for arch-specific use */
15 /* 0x20 reserved for arch-specific use */
16 #define PROT_NONE 0x0 /* page can not be accessed */
17 #define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
18 #define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
20 /* 0x01 - 0x03 are defined in linux/mman.h */
[all …]
/openbmc/linux/sound/pci/pcxhr/
H A Dpcxhr_hwdep.c50 if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2) in pcxhr_init_board()
53 if (((rmh.stat[0] >> (2 * FIELD_SIZE)) & MASK_FIRST_FIELD) < in pcxhr_init_board()
57 if ((rmh.stat[1] & 0x5F) < card_streams) in pcxhr_init_board()
60 if (((rmh.stat[1] >> 7) & 0x5F) < PCXHR_PLAYBACK_STREAMS) in pcxhr_init_board()
68 rmh.cmd[0] |= mgr->firmware_num; in pcxhr_init_board()
76 "PCXHR DSP version is %d.%d.%d\n", (rmh.stat[0]>>16)&0xff, in pcxhr_init_board()
77 (rmh.stat[0]>>8)&0xff, rmh.stat[0]&0xff); in pcxhr_init_board()
78 mgr->dsp_version = rmh.stat[0]; in pcxhr_init_board()
94 rmh.cmd[0] |= IO_NUM_REG_STATUS; in pcxhr_sub_init()
112 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; in pcxhr_sub_init()
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap4460.dtsi12 cpu0: cpu@0 {
32 reg = <0x4a002260 0x4
33 0x4a00232C 0x4
34 0x4a002378 0x18>;
36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
39 #thermal-sensor-cells = <0>;
45 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
46 <0x4A002268 0x4>;
52 1025000 0 0 0 0 0
53 1200000 0 0 0 0 0
[all …]
/openbmc/linux/sound/pci/ctxfi/
H A Dct20k1reg.h10 #define DSPXRAM_START 0x000000
11 #define DSPXRAM_END 0x013FFC
12 #define DSPAXRAM_START 0x020000
13 #define DSPAXRAM_END 0x023FFC
14 #define DSPYRAM_START 0x040000
15 #define DSPYRAM_END 0x04FFFC
16 #define DSPAYRAM_START 0x020000
17 #define DSPAYRAM_END 0x063FFC
18 #define DSPMICRO_START 0x080000
19 #define DSPMICRO_END 0x0B3FFC
[all …]

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