149148020SSam Ravnborg /* 249148020SSam Ravnborg ** asm-m68k/amigayle.h -- This header defines the registers of the gayle chip 349148020SSam Ravnborg ** found on the Amiga 1200 449148020SSam Ravnborg ** This information was found by disassembling card.resource, 549148020SSam Ravnborg ** so the definitions may not be 100% correct 649148020SSam Ravnborg ** anyone has an official doc ? 749148020SSam Ravnborg ** 849148020SSam Ravnborg ** Copyright 1997 by Alain Malek 949148020SSam Ravnborg ** 1049148020SSam Ravnborg ** This file is subject to the terms and conditions of the GNU General Public 1149148020SSam Ravnborg ** License. See the file COPYING in the main directory of this archive 1249148020SSam Ravnborg ** for more details. 1349148020SSam Ravnborg ** 1449148020SSam Ravnborg ** Created: 11/28/97 by Alain Malek 1549148020SSam Ravnborg */ 1649148020SSam Ravnborg 1749148020SSam Ravnborg #ifndef _M68K_AMIGAYLE_H_ 1849148020SSam Ravnborg #define _M68K_AMIGAYLE_H_ 1949148020SSam Ravnborg 2049148020SSam Ravnborg #include <linux/types.h> 2149148020SSam Ravnborg #include <asm/amigahw.h> 2249148020SSam Ravnborg 2349148020SSam Ravnborg /* memory layout */ 2449148020SSam Ravnborg 2549148020SSam Ravnborg #define GAYLE_RAM (0x600000+zTwoBase) 2649148020SSam Ravnborg #define GAYLE_RAMSIZE (0x400000) 2749148020SSam Ravnborg #define GAYLE_ATTRIBUTE (0xa00000+zTwoBase) 2849148020SSam Ravnborg #define GAYLE_ATTRIBUTESIZE (0x020000) 2949148020SSam Ravnborg #define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */ 3049148020SSam Ravnborg #define GAYLE_IOSIZE (0x010000) 3149148020SSam Ravnborg #define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */ 3249148020SSam Ravnborg 3349148020SSam Ravnborg /* offset for accessing odd IO registers */ 3449148020SSam Ravnborg #define GAYLE_ODD (GAYLE_IO_8BITODD-GAYLE_IO-1) 3549148020SSam Ravnborg 3649148020SSam Ravnborg /* GAYLE registers */ 3749148020SSam Ravnborg 3849148020SSam Ravnborg struct GAYLE { 3949148020SSam Ravnborg u_char cardstatus; 4049148020SSam Ravnborg u_char pad0[0x1000-1]; 4149148020SSam Ravnborg 4249148020SSam Ravnborg u_char intreq; 4349148020SSam Ravnborg u_char pad1[0x1000-1]; 4449148020SSam Ravnborg 4549148020SSam Ravnborg u_char inten; 4649148020SSam Ravnborg u_char pad2[0x1000-1]; 4749148020SSam Ravnborg 4849148020SSam Ravnborg u_char config; 4949148020SSam Ravnborg u_char pad3[0x1000-1]; 5049148020SSam Ravnborg }; 5149148020SSam Ravnborg 5249148020SSam Ravnborg #define GAYLE_ADDRESS (0xda8000) /* gayle main registers base address */ 5349148020SSam Ravnborg 5449148020SSam Ravnborg #define GAYLE_RESET (0xa40000) /* write 0x00 to start reset, 5549148020SSam Ravnborg read 1 byte to stop reset */ 5649148020SSam Ravnborg 5749148020SSam Ravnborg #define gayle (*(volatile struct GAYLE *)(zTwoBase+GAYLE_ADDRESS)) 5849148020SSam Ravnborg #define gayle_reset (*(volatile u_char *)(zTwoBase+GAYLE_RESET)) 5949148020SSam Ravnborg 6049148020SSam Ravnborg #define gayle_attribute ((volatile u_char *)(GAYLE_ATTRIBUTE)) 6149148020SSam Ravnborg 6249148020SSam Ravnborg #if 0 6349148020SSam Ravnborg #define gayle_inb(a) readb( GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) ) 6449148020SSam Ravnborg #define gayle_outb(v,a) writeb( v, GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) ) 6549148020SSam Ravnborg 6649148020SSam Ravnborg #define gayle_inw(a) readw( GAYLE_IO+(a) ) 6749148020SSam Ravnborg #define gayle_outw(v,a) writew( v, GAYLE_IO+(a) ) 6849148020SSam Ravnborg #endif 6949148020SSam Ravnborg 7049148020SSam Ravnborg /* GAYLE_CARDSTATUS bit def */ 7149148020SSam Ravnborg 7249148020SSam Ravnborg #define GAYLE_CS_CCDET 0x40 /* credit card detect */ 7349148020SSam Ravnborg #define GAYLE_CS_BVD1 0x20 /* battery voltage detect 1 */ 7449148020SSam Ravnborg #define GAYLE_CS_SC 0x20 /* credit card status change */ 7549148020SSam Ravnborg #define GAYLE_CS_BVD2 0x10 /* battery voltage detect 2 */ 7649148020SSam Ravnborg #define GAYLE_CS_DA 0x10 /* digital audio */ 7749148020SSam Ravnborg #define GAYLE_CS_WR 0x08 /* write enable (1 == enabled) */ 7849148020SSam Ravnborg #define GAYLE_CS_BSY 0x04 /* credit card busy */ 7949148020SSam Ravnborg #define GAYLE_CS_IRQ 0x04 /* interrupt request */ 8049148020SSam Ravnborg 8149148020SSam Ravnborg /* GAYLE_IRQ bit def */ 8249148020SSam Ravnborg 8349148020SSam Ravnborg #define GAYLE_IRQ_IDE 0x80 8449148020SSam Ravnborg #define GAYLE_IRQ_CCDET 0x40 8549148020SSam Ravnborg #define GAYLE_IRQ_BVD1 0x20 8649148020SSam Ravnborg #define GAYLE_IRQ_SC 0x20 8749148020SSam Ravnborg #define GAYLE_IRQ_BVD2 0x10 8849148020SSam Ravnborg #define GAYLE_IRQ_DA 0x10 8949148020SSam Ravnborg #define GAYLE_IRQ_WR 0x08 9049148020SSam Ravnborg #define GAYLE_IRQ_BSY 0x04 9149148020SSam Ravnborg #define GAYLE_IRQ_IRQ 0x04 9249148020SSam Ravnborg #define GAYLE_IRQ_IDEACK1 0x02 9349148020SSam Ravnborg #define GAYLE_IRQ_IDEACK0 0x01 9449148020SSam Ravnborg 9549148020SSam Ravnborg /* GAYLE_CONFIG bit def 9649148020SSam Ravnborg (bit 0-1 for program voltage, bit 2-3 for access speed */ 9749148020SSam Ravnborg 9849148020SSam Ravnborg #define GAYLE_CFG_0V 0x00 9949148020SSam Ravnborg #define GAYLE_CFG_5V 0x01 10049148020SSam Ravnborg #define GAYLE_CFG_12V 0x02 10149148020SSam Ravnborg 10249148020SSam Ravnborg #define GAYLE_CFG_100NS 0x08 10349148020SSam Ravnborg #define GAYLE_CFG_150NS 0x04 10449148020SSam Ravnborg #define GAYLE_CFG_250NS 0x00 10549148020SSam Ravnborg #define GAYLE_CFG_720NS 0x0c 10649148020SSam Ravnborg 107*9aed2302SGeert Uytterhoeven struct gayle_ide_platform_data { 108*9aed2302SGeert Uytterhoeven unsigned long base; 109*9aed2302SGeert Uytterhoeven unsigned long irqport; 110*9aed2302SGeert Uytterhoeven int explicit_ack; /* A1200 IDE needs explicit ack */ 111*9aed2302SGeert Uytterhoeven }; 112*9aed2302SGeert Uytterhoeven 11349148020SSam Ravnborg #endif /* asm-m68k/amigayle.h */ 114