Merge drm/drm-fixes into drm-misc-fixes

Forwarding to v6.6-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
"DT core:

- Add support for generating DT nodes for PCI devi

Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
"DT core:

- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.

- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.

- Refactor node and property manipulation functions to better share
code with old API and changeset API

- Refactor changeset print functions to a common implementation

- Move some platform_device specific functions into of_platform.c

Bindings:

- Treewide fixing of typos

- Treewide clean-up of SPDX tags to use 'OR' consistently

- Last chunk of dropping unnecessary quotes. With that, the check for
unnecessary quotes is enabled in yamllint.

- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format

- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings

- Fixes for Rockchip DWC PCI binding

- Ensure all properties are evaluated on USB connector schema

- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations"

* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
dt-bindings: usb: Add V3s compatible string for OHCI
dt-bindings: usb: Add V3s compatible string for EHCI
dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
dt-bindings: vendor-prefixes: document Saef Technology
dt-bindings: thermal: lmh: update maintainer address
of: unittest: Fix of_unittest_pci_node() kconfig dependencies
dt-bindings: crypto: ice: Document sm8450 inline crypto engine
dt-bindings: ufs: qcom: Add ICE to sm8450 example
dt-bindings: ufs: qcom: Add sm6115 binding
dt-bindings: ufs: qcom: Add reg-names property for ICE
dt-bindings: yamllint: Enable quoted string check
dt-bindings: Drop remaining unneeded quotes
of: unittest-data: Fix whitespace - angular brackets
of: unittest-data: Fix whitespace - indentation
of: unittest-data: Fix whitespace - blank lines
of: unittest-data: Convert remaining overlay DTS files to sugar syntax
of: overlay: unittest: Add test for unresolved symbol
of: unittest: Add separators to of_unittest_overlay_high_level()
of: unittest: Cleanup partially-applied overlays
of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
...

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dt-bindings: PCI: dwc: rockchip: Use generic binding

Use the generic binding for Rockchip. This should either be
ignored/dropped or squashed into the previous commit.

Signed-off-by: Sebastian Reich

dt-bindings: PCI: dwc: rockchip: Use generic binding

Use the generic binding for Rockchip. This should either be
ignored/dropped or squashed into the previous commit.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-4-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: improve msi handling

Allow missing "msi" interrupt, iff the node has a "msi-map" property.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lo

dt-bindings: PCI: dwc: improve msi handling

Allow missing "msi" interrupt, iff the node has a "msi-map" property.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-2-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>

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Merge branch 'next' into for-linus

Prepare input updates for 6.3 merge window.

Merge drm/drm-next into drm-misc-next

Backmerging into drm-misc-next to get DRM accelerator infrastructure,
which is required by ipuv driver.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge wireless into wireless-next

Due to the two cherry picked commits from wireless to wireless-next we have
several conflicts in mt76. To avoid any bugs with conflicts merge wireless into
wireless

Merge wireless into wireless-next

Due to the two cherry picked commits from wireless to wireless-next we have
several conflicts in mt76. To avoid any bugs with conflicts merge wireless into
wireless-next.

96f134dc1964 wifi: mt76: handle possible mt76_rx_token_consume failures
fe13dad8992b wifi: mt76: dma: do not increment queue head if mt76_dma_add_buf fails

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Merge tag 'v6.2-rc3' into next

Merge with mainline to bring in timer_shutdown_sync() API.

Merge drm/drm-fixes into drm-misc-fixes

Let's start the fixes cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge drm/drm-next into drm-intel-next

Sync up with v6.2-rc1.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-gt-next

Sync after v6.2-rc1 landed in drm-next.

We need to get some dependencies in place before we can merge
the fixes series from Gwan-gyeong and Chris.

Referen

Merge drm/drm-next into drm-intel-gt-next

Sync after v6.2-rc1 landed in drm-next.

We need to get some dependencies in place before we can merge
the fixes series from Gwan-gyeong and Chris.

References: https://lore.kernel.org/all/Y6x5JCDnh2rvh4lA@intel.com/
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Merge tag 'v6.2-rc1' into media_tree

Linux 6.2-rc1

* tag 'v6.2-rc1': (14398 commits)
Linux 6.2-rc1
treewide: Convert del_timer*() to timer_shutdown*()
pstore: Properly assign mem_type propert

Merge tag 'v6.2-rc1' into media_tree

Linux 6.2-rc1

* tag 'v6.2-rc1': (14398 commits)
Linux 6.2-rc1
treewide: Convert del_timer*() to timer_shutdown*()
pstore: Properly assign mem_type property
pstore: Make sure CONFIG_PSTORE_PMSG selects CONFIG_RT_MUTEXES
cfi: Fix CFI failure with KASAN
perf python: Fix splitting CC into compiler and options
afs: Stop implementing ->writepage()
afs: remove afs_cache_netfs and afs_zap_permits() declarations
afs: remove variable nr_servers
afs: Fix lost servers_outstanding count
ALSA: usb-audio: Add new quirk FIXED_RATE for JBL Quantum810 Wireless
ALSA: azt3328: Remove the unused function snd_azf3328_codec_outl()
gcov: add support for checksum field
test_maple_tree: add test for mas_spanning_rebalance() on insufficient data
maple_tree: fix mas_spanning_rebalance() on insufficient data
hugetlb: really allocate vma lock for all sharable vmas
kmsan: export kmsan_handle_urb
kmsan: include linux/vmalloc.h
mm/mempolicy: fix memory leak in set_mempolicy_home_node system call
mm, mremap: fix mremap() expanding vma with addr inside vma
...

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Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

No conflicts.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Merge remote-tracking branch 'torvalds/master' into perf/core

To resolve a trivial merge conflict with c302378bc157f6a7 ("libbpf:
Hashmap interface update to allow both long and void* keys/values"),

Merge remote-tracking branch 'torvalds/master' into perf/core

To resolve a trivial merge conflict with c302378bc157f6a7 ("libbpf:
Hashmap interface update to allow both long and void* keys/values"),
where a function present upstream was removed in the perf tools
development tree.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

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Merge tag 'pci-v6.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
"Enumeration:

- Squash portdrv_{core,pci}.c into portdrv.c to ease

Merge tag 'pci-v6.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
"Enumeration:

- Squash portdrv_{core,pci}.c into portdrv.c to ease maintenance and
make more things static.

- Make portdrv bind to Switch Ports that have AER. Previously, if
these Ports lacked MSI/MSI-X, portdrv failed to bind, which meant
the Ports couldn't be suspended to low-power states. AER on these
Ports doesn't use interrupts, and the AER driver doesn't need to
claim them.

- Assign PCI domain IDs using ida_alloc(), which makes host bridge
add/remove work better.

Resource management:

- To work better with recent BIOSes that use EfiMemoryMappedIO for
PCI host bridge apertures, remove those regions from the E820 map
(E820 entries normally prevent us from allocating BARs). In v5.19,
we added some quirks to disable E820 checking, but that's not very
maintainable. EfiMemoryMappedIO means the OS needs to map the
region for use by EFI runtime services; it shouldn't prevent OS
from using it.

PCIe native device hotplug:

- Build pciehp by default if USB4 is enabled, since Thunderbolt/USB4
PCIe tunneling depends on native PCIe hotplug.

- Enable Command Completed Interrupt only if supported to avoid user
confusion from lspci output that says this is enabled but not
supported.

- Prevent pciehp from binding to Switch Upstream Ports; this happened
because of interaction with acpiphp and caused devices below the
Upstream Port to disappear.

Power management:

- Convert AGP drivers to generic power management. We hope to remove
legacy power management from the PCI core eventually.

Virtualization:

- Fix pci_device_is_present(), which previously always returned
"false" for VFs, causing virtio hangs when unbinding the driver.

Miscellaneous:

- Convert drivers to gpiod API to prepare for dropping some legacy
code.

- Fix DOE fencepost error for the maximum data object length.

Baikal-T1 PCIe controller driver:

- Add driver and DT bindings.

Broadcom STB PCIe controller driver:

- Enable Multi-MSI.

- Delay 100ms after PERST# deassert to allow power and clocks to
stabilize.

- Configure Read Completion Boundary to 64 bytes.

Freescale i.MX6 PCIe controller driver:

- Initialize PHY before deasserting core reset to fix a regression in
v6.0 on boards where the PHY provides the reference.

- Fix imx6sx and imx8mq clock names in DT schema.

Intel VMD host bridge driver:

- Fix Secondary Bus Reset on VMD bridges, which allows reset of NVMe
SSDs in VT-d pass-through scenarios.

- Disable MSI remapping, which gets re-enabled by firmware during
suspend/resume.

MediaTek PCIe Gen3 controller driver:

- Add MT7986 and MT8195 support.

Qualcomm PCIe controller driver:

- Add SC8280XP/SA8540P basic interconnect support.

Rockchip DesignWare PCIe controller driver:

- Base DT schema on common Synopsys schema.

Synopsys DesignWare PCIe core:

- Collect DT items shared between Root Port and Endpoint (PERST GPIO,
PHY info, clocks, resets, link speed, number of lanes, number of
iATU windows, interrupt info, etc) to snps,dw-pcie-common.yaml.

- Add dma-ranges support for Root Ports and Endpoints.

- Consolidate DT resource retrieval for "dbi", "dbi2", "atu", etc. to
reduce code duplication.

- Add generic names for clocks and resets to encourage more
consistent naming across drivers using DesignWare IP.

- Stop advertising PTM Responder role for Endpoints, which aren't
allowed to be responders.

TI J721E PCIe driver:

- Add j721s2 host mode ID to DT schema.

- Add interrupt properties to DT schema.

Toshiba Visconti PCIe controller driver:

- Fix interrupts array max constraints in DT schema"

* tag 'pci-v6.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (95 commits)
x86/PCI: Use pr_info() when possible
x86/PCI: Fix log message typo
x86/PCI: Tidy E820 removal messages
PCI: Skip allocate_resource() if too little space available
efi/x86: Remove EfiMemoryMappedIO from E820 map
PCI/portdrv: Allow AER service only for Root Ports & RCECs
PCI: xilinx-nwl: Fix coding style violations
PCI: mvebu: Switch to using gpiod API
PCI: pciehp: Enable Command Completed Interrupt only if supported
PCI: aardvark: Switch to using devm_gpiod_get_optional()
dt-bindings: PCI: mediatek-gen3: add support for mt7986
dt-bindings: PCI: mediatek-gen3: add SoC based clock config
dt-bindings: PCI: qcom: Allow 'dma-coherent' property
PCI: mt7621: Add sentinel to quirks table
PCI: vmd: Fix secondary bus reset for Intel bridges
PCI: endpoint: pci-epf-vntb: Fix sparse ntb->reg build warning
PCI: endpoint: pci-epf-vntb: Fix sparse build warning for epf_db
PCI: endpoint: pci-epf-vntb: Replace hardcoded 4 with sizeof(u32)
PCI: endpoint: pci-epf-vntb: Remove unused epf_db_phy struct member
PCI: endpoint: pci-epf-vntb: Fix call pci_epc_mem_free_addr() in error path
...

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Merge branch 'main' into zstd-linus

Merge tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
"The devicetree changes contain exactly 1000 non-merge changesets,
incl

Merge tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
"The devicetree changes contain exactly 1000 non-merge changesets,
including a number of new arm64 SoC variants from Qualcomm and Apple,
as well as the Renesas r9a07g043f/u chip in both arm64 and riscv
variants.

While we have occasionally merged support for non-arm SoCs in the
past, this is now the normal path for riscv devicetree files.

The most notable changes, by SoC platform, are:

- The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M1 Ultra) chips
now have initial support. This is particularly nice as I am typing
this on a T6002 Mac Studio with only a small number of driver
patches.

- Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662),
SM4250 (Snapdragon 460), SM6375 (Snapdragon 695), SDM670
(Snapdragon 670), MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon
650) are all mobile phone chips that are closely related to others
we already support.

Adding those helps support more phones and we add several models
from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and
Google (Pixel 3a).

There are also new variants of the Herobrine and Trogdor chromebook
motherboards. SA8540P is an automotive SoC used in the Qdrive-3
development platform

- Rockchips gains no new SoC variants, but a lot of new boards: three
mobile gaming systems based on RK3326 Odroid-Go/rg351 family, two
more Anbernic gaming systems based on RK3566 and a number of other
RK356x based single-board computers.

- Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
the newly added RZ/Five is based on the same design, this now gets
reorganized in order to share most of the dts description between
the two and add the RZ/Five SMARC EVK board support.

Aside from that, there are the usual changes all over the tree:

- New boards on other platforms contain two ASpeed BMC users, two
Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based
Kobo Aura2 ebook reader, two i.MX8 based development boards, two
Uniphier Pro5 development boards, the STM32MP1 testbench board from
DHCOR, the TI K3 based BeagleBone AI-64 board, and the Mediatek
Helio X10 based Sony Xperia M5 phone.

- The Starfive JH7100 source gets reorganized in order to support the
VisionFive V1 board.

- Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168, TI,
ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
spear, ... The treewide cleanups now have a lot of fixes for cache
nodes and other binding violoations.

- Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm and
Renesas platforms, adding a lot more on-chip device support

- A rework of the way that DTB overlays are built"

* tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (979 commits)
arm64: dts: apple: t6002: Fix GPU power domains
arm64: dts: apple: t600x-pmgr: Fix search & replace typo
arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
arm64: dts: apple: Rename dart-sio* to sio-dart*
arch: arm64: apple: t600x: Use standard "iommu" node name
arch: arm64: apple: t8103: Use standard "iommu" node name
ARM: dts: socfpga: Fix pca9548 i2c-mux node name
dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
dt-bindings: iio: adc: qcom,spmi-vadc: extend example
arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
arm64: dts: qcom: sm8450: align MMC node names with dtschema
arm64: dts: qcom: sc7180-trogdor: use generic node names
arm64: dts: qcom: sm8450-hdk: add sound support
arm64: dts: qcom: sm8450: add Soundwire and LPASS
...

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Merge branch 'remotes/lorenzo/pci/dwc'

- Fix n_fts[] array overrun (Vidya Sagar)

- Don't advertise PTM Responder role for Endpoints (Vidya Sagar)

- Fix qcom "reset assert" error message (Manivanna

Merge branch 'remotes/lorenzo/pci/dwc'

- Fix n_fts[] array overrun (Vidya Sagar)

- Don't advertise PTM Responder role for Endpoints (Vidya Sagar)

- Fix qcom "reset assert" error message (Manivannan Sadhasivam)

- Downgrade "link didn't come up" message to dev_info (Vidya Sagar)

- Initialize PHY before deasserting core reset so the link comes up on
boards where the PHY provides the reference clock (this was a regression
in v6.0) (Sascha Hauer)

- Switch histb to the gpiod API (Dmitry Torokhov)

- Fix imx6sx and imx8mq clock names in DT binding (Serge Semin)

- Fix visconti MSI interrupt in DT binding (Serge Semin)

- Consolidate reset-gpio, cdm, windows info in common DT shared by both
Root Port and Endpoint bindings (Serge Semin)

- Remove bus node from DT examples (Serge Semin)

- Add common phys, phy-names to DT (Serge Semin)

- Add default max-link-speed of Gen5 to DT (Serge Semin)

- Apply generic schema for generic device (Serge Semin)

- Add default max-functions of 32 to DT (Serge Semin)

- Add common interrupts, interrupt-names to DT (Serge Semin)

- Add common regs, reg-names to DT (Serge Semin)

- Add common clocks, resets to DT (Serge Semin)

- Add dma-coherent to DT (Serge Semin)

- Apply common schema to Rockchip DT (Serge Semin)

- Add Baikal-T1 DT bindings (Serge Semin)

- Add dma-ranges support in DesignWare core (Serge Semin)

- Add dw_pcie_cap_is() for testing controller capabilities (Serge Semin)

- Add generic resources getter to DesignWare core (Serge Semin)

- Combine iATU detection procedures (Serge Semin)

- Add generic clock and reset names to DesignWare core (Serge Semin)

- Add Baikal-T1 PCIe controller driver (Serge Semin)

* remotes/lorenzo/pci/dwc:
PCI: dwc: Add Baikal-T1 PCIe controller support
PCI: dwc: Introduce generic platform clocks and resets
PCI: dwc: Combine iATU detection procedures
PCI: dwc: Introduce generic resources getter
PCI: dwc: Introduce generic controller capabilities interface
PCI: dwc: Introduce dma-ranges property support for RC-host
dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings
dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes
dt-bindings: PCI: dwc: Add dma-coherent property
dt-bindings: PCI: dwc: Add clocks/resets common properties
dt-bindings: PCI: dwc: Add reg/reg-names common properties
dt-bindings: PCI: dwc: Add interrupts/interrupt-names common properties
dt-bindings: PCI: dwc: Add max-functions EP property
dt-bindings: PCI: dwc: Apply generic schema for generic device only
dt-bindings: PCI: dwc: Add max-link-speed common property
dt-bindings: PCI: dwc: Add phys/phy-names common properties
dt-bindings: PCI: dwc: Remove bus node from the examples
dt-bindings: PCI: dwc: Detach common RP/EP DT bindings
dt-bindings: visconti-pcie: Fix interrupts array max constraints
dt-bindings: imx6q-pcie: Fix clock names for imx6sx and imx8mq
PCI: histb: Switch to using gpiod API
PCI: imx6: Initialize PHY before deasserting core reset
PCI: dwc: Use dev_info for PCIe link down event logging
PCI: qcom: Fix error message for reset_control_assert()
PCI: designware-ep: Disable PTM capabilities for EP mode
PCI: Add PCI_PTM_CAP_RES macro
PCI: dwc: Fix n_fts[] array overrun

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dt-bindings: PCI: dwc: Add clocks/resets common properties

DW PCIe RP/EP reference manuals explicit define all the clocks and reset
requirements in [1] and [2]. Seeing the DW PCIe vendor-specific
DT

dt-bindings: PCI: dwc: Add clocks/resets common properties

DW PCIe RP/EP reference manuals explicit define all the clocks and reset
requirements in [1] and [2]. Seeing the DW PCIe vendor-specific
DT-bindings have already started assigning random names to the same set of
the clocks and resets lines, let's define a generic names sets and add
them to the DW PCIe common DT-schema.

Note since there are DW PCI-based vendor-specific DT-bindings with the
custom names assigned to the same clocks and resets resources we have no
much choice but to add them to the generic DT-schemas in order to have the
schemas being applicable for such devices. These names are marked as
vendor-specific and should be avoided being used in new bindings in favor
of the generic names.

[1] Synopsys DesignWare Cores PCI Express Controller Databook - DWC PCIe
Root Port, Version 5.40a, March 2019, p.55 - 78.
[2] Synopsys DesignWare Cores PCI Express Controller Databook - DWC PCIe
Endpoint, Version 5.40a, March 2019, p.58 - 81.

Link: https://lore.kernel.org/r/20221113191301.5526-12-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Add reg/reg-names common properties

Even though there is a more-or-less limited set of the CSR spaces can be
defined for each DW PCIe controller the generic DT-schema currentl

dt-bindings: PCI: dwc: Add reg/reg-names common properties

Even though there is a more-or-less limited set of the CSR spaces can be
defined for each DW PCIe controller the generic DT-schema currently
doesn't specify much limitations on the reg-space names used for one or
another range. In order to prevent the vendor-specific controller schemas
further deviation from the generic interface let's fix that by introducing
the reg-names definition in the common DW PCIe DT-schemas and preserving
the generic "reg" and "reg-names" properties in there. New DW PCIe device
DT-bindings are encouraged to use the generic set of the CSR spaces
defined in the generic DW PCIe RP/EP DT-bindings, while the already
available vendor-specific DT-bindings can still apple the common
DT-schemas.

Note the number of reg/reg-names items need to be changed in the DW PCIe
EP DT-schema since aside with the "dbi" CSRs space these arrays can have
"dbi2", "addr_space", "atu", etc ranges.

Also note since there are DW PCIe-based vendor-specific DT-bindings with
the custom names assigned to the same CSR resources we have no much choice
but to add them to the generic DT-schemas in order to have the schemas
being applicable for such devices. These names are marked as
vendor-specific and should be avoided being used in new bindings in favor
of the generic names.

Link: https://lore.kernel.org/r/20221113191301.5526-11-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Add interrupts/interrupt-names common properties

Currently the 'interrupts' and 'interrupt-names' properties are defined
being too generic to really describe any actual IRQ in

dt-bindings: PCI: dwc: Add interrupts/interrupt-names common properties

Currently the 'interrupts' and 'interrupt-names' properties are defined
being too generic to really describe any actual IRQ interface. Moreover
the DW PCIe End-point devices are left with no IRQ signals. All of that
can be fixed by adding the IRQ-related properties to the common DW PCIe
DT-schemas in accordance with the hardware reference manual. The DW PCIe
common DT-schema will contain the generic properties definitions with just
a number of entries per property, while the DW PCIe RP/EP-specific schemas
will have the particular number of items and the generic resource names
listed.

Note since there are DW PCI-based vendor-specific DT-bindings with the
custom names assigned to the same IRQ resources we have no much choice but
to add them to the generic DT-schemas in order to have the schemas being
applicable for such devices. These names are marked as vendor-specific and
should be avoided being used in new bindings in favor of the generic
names.

Link: https://lore.kernel.org/r/20221113191301.5526-10-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Apply generic schema for generic device only

Having the generic compatible strings constraints with the 'any'+'generic
string' semantic implicitly encourages either to add new

dt-bindings: PCI: dwc: Apply generic schema for generic device only

Having the generic compatible strings constraints with the 'any'+'generic
string' semantic implicitly encourages either to add new DW PCIe-based
DT-bindings with the generic compatible string attached or just forget
about adding new DT-bindings since the corresponding DT-node will be
evaluated anyway. Moreover having that semantic implemented in the
generic DT-schema causes the DT-validation tool to apply the schema twice:
first by implicit compatible-string-based selection and second by means of
the 'allOf: [ $ref ]' statement. Let's fix all of that by dropping the
compatible property constraints and selecting the generic DT-schema only
for the purely generic DW PCIe DT-nodes. The later is required since there
is a driver for such devices. (Though there are no such DT-nodes currently
defined in the kernel DT sources.)

Link: https://lore.kernel.org/r/20221113191301.5526-8-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Add max-link-speed common property

In accordance with [1] DW PCIe controllers support up to Gen5 link speed.
Let's add the max-link-speed property upper bound to 5 then. The D

dt-bindings: PCI: dwc: Add max-link-speed common property

In accordance with [1] DW PCIe controllers support up to Gen5 link speed.
Let's add the max-link-speed property upper bound to 5 then. The DT
bindings of the particular devices are expected to setup more strict
constraint on that parameter.

[1] Synopsys DesignWare Cores PCI Express Controller Databook, Version
5.40a, March 2019, p. 27

Link: https://lore.kernel.org/r/20221113191301.5526-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Add phys/phy-names common properties

It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit
PHY phandle references. There can be up to 16 PHYs attach in acc

dt-bindings: PCI: dwc: Add phys/phy-names common properties

It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit
PHY phandle references. There can be up to 16 PHYs attach in accordance
with the maximum number of supported PCIe lanes. Let's extend the common
DW PCIe controller schema with the 'phys' and 'phy-names' properties
definition. There two types PHY names are defined: preferred generic names
'^pcie[0-9]+$' and non-preferred vendor-specific names
'^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by
the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6;
"pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d":
keystone, dra7xx; "pcie": histb, etc).

Link: https://lore.kernel.org/r/20221113191301.5526-6-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

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dt-bindings: PCI: dwc: Remove bus node from the examples

It's absolutely redundant seeing by default each node is embedded into its
own example-X node with address and size cells set to 1.

Link: ht

dt-bindings: PCI: dwc: Remove bus node from the examples

It's absolutely redundant seeing by default each node is embedded into its
own example-X node with address and size cells set to 1.

Link: https://lore.kernel.org/r/20221113191301.5526-5-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>

show more ...