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Searched refs:memop (Results 1 – 25 of 47) sorted by relevance

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/openbmc/qemu/tcg/
H A Dtcg-op-ldst.c227 TCGArg idx, MemOp memop) in tcg_gen_qemu_ld_i32_int() argument
235 orig_memop = memop = tcg_canonicalize_memop(memop, 0, 0); in tcg_gen_qemu_ld_i32_int()
236 orig_oi = oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
238 if ((memop & MO_BSWAP) && !tcg_target_has_memory_bswap(memop)) { in tcg_gen_qemu_ld_i32_int()
239 memop &= ~MO_BSWAP; in tcg_gen_qemu_ld_i32_int()
241 if ((memop & MO_SSIZE) == MO_SW) { in tcg_gen_qemu_ld_i32_int()
242 memop &= ~MO_SIGN; in tcg_gen_qemu_ld_i32_int()
244 oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
257 if ((orig_memop ^ memop) & MO_BSWAP) { in tcg_gen_qemu_ld_i32_int()
274 MemOp memop, TCGType addr_type) in tcg_gen_qemu_ld_i32_chk() argument
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H A Dtcg-internal.h84 bool tcg_target_has_memory_bswap(MemOp memop);
/openbmc/qemu/accel/tcg/
H A Dtrace-events17 load_atom2_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
18 load_atom4_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
20 load_atom8_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
21 load_atom16_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
23 store_atom2_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
24 store_atom4_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
25 store_atom8_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
26 store_atom16_fallback(uint32_t memop, uintptr_t ra) "mop:0x%"PRIx32", ra:0x%"PRIxPTR""
H A Dldst_atomicity.c.inc25 * Return the lg2 bytes of atomicity required by @memop for @p.
29 static int required_atomicity(CPUState *cpu, uintptr_t p, MemOp memop)
31 MemOp atom = memop & MO_ATOM_MASK;
32 MemOp size = memop & MO_SIZE;
395 * @memop: the full memory op
397 * Load 2 bytes from @p, honoring the atomicity of @memop.
400 void *pv, MemOp memop)
415 atmax = required_atomicity(cpu, pi, memop);
437 * @memop: the full memory op
439 * Load 4 bytes from @p, honoring the atomicity of @memop.
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H A Dcputlb.c1230 int mmu_idx, MemOp memop, int size, in tlb_fill_align() argument
1238 memop, size, probe, ra)) { in tlb_fill_align()
1244 if (addr & ((1u << memop_alignment_bits(memop)) - 1)) { in tlb_fill_align()
1615 MemOp memop; member
1633 static bool mmu_lookup1(CPUState *cpu, MMULookupPageData *data, MemOp memop, in mmu_lookup1() argument
1649 memop, data->size, false, ra); in mmu_lookup1()
1663 int a_bits = memop_alignment_bits(memop); in mmu_lookup1()
1672 int at_bits = memop_atomicity_bits(memop); in mmu_lookup1()
1739 l->memop = get_memop(oi); in mmu_lookup()
1745 l->page[0].size = memop_size(l->memop); in mmu_lookup()
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/openbmc/qemu/include/exec/
H A Dmemop.h173 static inline unsigned memop_alignment_bits(MemOp memop) in memop_alignment_bits() argument
175 unsigned a = memop & MO_AMASK; in memop_alignment_bits()
182 a = memop & MO_SIZE; in memop_alignment_bits()
196 static inline unsigned memop_atomicity_bits(MemOp memop) in memop_atomicity_bits() argument
198 unsigned size = memop & MO_SIZE; in memop_atomicity_bits()
200 switch (memop & MO_ATOM_MASK) { in memop_atomicity_bits()
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_xthead.c.inc346 static bool gen_fload_idx(DisasContext *ctx, arg_th_memidx *a, MemOp memop,
352 tcg_gen_qemu_ld_i64(rd, addr, ctx->mem_idx, memop);
353 if ((memop & MO_SIZE) == MO_32) {
366 static bool gen_fstore_idx(DisasContext *ctx, arg_th_memidx *a, MemOp memop,
372 tcg_gen_qemu_st_i64(rd, addr, ctx->mem_idx, memop);
555 * Load with memop from indexed address and add (imm5 << imm2) to rs1.
559 static bool gen_load_inc(DisasContext *ctx, arg_th_meminc *a, MemOp memop,
571 tcg_gen_qemu_ld_tl(rd, addr, ctx->mem_idx, memop);
579 * Store with memop to indexed address and add (imm5 << imm2) to rs1.
583 static bool gen_store_inc(DisasContext *ctx, arg_th_meminc *a, MemOp memop,
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H A Dtrans_rvzce.c.inc178 MemOp memop = get_ol(ctx) == MXL_RV32 ? MO_TEUL : MO_TEUQ;
179 int reg_size = memop_size(memop);
191 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop);
223 MemOp memop = get_ol(ctx) == MXL_RV32 ? MO_TEUL : MO_TEUQ;
224 int reg_size = memop_size(memop);
236 tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx, memop);
H A Dtrans_rvi.c.inc284 static bool gen_load_tl(DisasContext *ctx, arg_lb *a, MemOp memop)
289 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop);
295 static bool gen_load_i128(DisasContext *ctx, arg_lb *a, MemOp memop)
304 if ((memop & MO_SIZE) <= MO_64) {
305 tcg_gen_qemu_ld_tl(destl, addrl, ctx->mem_idx, memop);
306 if (memop & MO_SIGN) {
322 static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop)
327 memop |= MO_ATOM_WITHIN16;
331 out = gen_load_i128(ctx, a, memop);
333 out = gen_load_tl(ctx, a, memop);
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H A Dtrans_rvd.c.inc45 MemOp memop = MO_TEUQ;
57 memop |= MO_ATOM_NONE;
59 memop |= MO_ATOM_WITHIN16;
61 memop |= MO_ATOM_IFALIGN;
66 tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], addr, ctx->mem_idx, memop);
75 MemOp memop = MO_TEUQ;
81 memop |= MO_ATOM_NONE;
83 memop |= MO_ATOM_WITHIN16;
85 memop |= MO_ATOM_IFALIGN;
90 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, memop);
H A Dtrans_rvf.c.inc46 MemOp memop = MO_TEUL;
52 memop |= MO_ATOM_WITHIN16;
58 tcg_gen_qemu_ld_i64(dest, addr, ctx->mem_idx, memop);
68 MemOp memop = MO_TEUL;
74 memop |= MO_ATOM_WITHIN16;
79 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, memop);
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a32.h36 void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop);
37 void read_neon_element64(TCGv_i64 dest, int reg, int ele, MemOp memop);
38 void write_neon_element32(TCGv_i32 src, int reg, int ele, MemOp memop);
39 void write_neon_element64(TCGv_i64 src, int reg, int ele, MemOp memop);
47 long neon_element_offset(int reg, int element, MemOp memop);
H A Dtranslate-a64.c286 MemOp memop, bool is_unpriv, in gen_mte_check1_mmuidx() argument
297 desc = FIELD_DP32(desc, MTEDESC, ALIGN, memop_alignment_bits(memop)); in gen_mte_check1_mmuidx()
298 desc = FIELD_DP32(desc, MTEDESC, SIZEM1, memop_size(memop) - 1); in gen_mte_check1_mmuidx()
309 bool tag_checked, MemOp memop) in gen_mte_check1() argument
311 return gen_mte_check1_mmuidx(s, addr, is_write, tag_checked, memop, in gen_mte_check1()
954 TCGv_i64 tcg_addr, MemOp memop, int memidx, in do_gpr_st_memidx() argument
959 tcg_gen_qemu_st_i64(source, tcg_addr, memidx, memop); in do_gpr_st_memidx()
965 (memop & MO_SIZE), in do_gpr_st_memidx()
976 TCGv_i64 tcg_addr, MemOp memop, in do_gpr_st() argument
981 do_gpr_st_memidx(s, source, tcg_addr, memop, get_mem_index(s), in do_gpr_st()
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H A Dtlb_helper.c323 MemOp memop, int size, bool probe, uintptr_t ra) in arm_cpu_tlb_fill_align() argument
345 if (address & ((1 << memop_alignment_bits(memop)) - 1)) { in arm_cpu_tlb_fill_align()
347 } else if (!get_phys_addr(&cpu->env, address, access_type, memop, in arm_cpu_tlb_fill_align()
H A Dtranslate-a64.h54 bool tag_checked, MemOp memop);
56 bool tag_checked, int total_size, MemOp memop);
H A Dtranslate.c192 static void disas_set_da_iss(DisasContext *s, MemOp memop, ISSInfo issinfo) in disas_set_da_iss() argument
195 int sas = memop & MO_SIZE; in disas_set_da_iss()
196 bool sse = memop & MO_SIGN; in disas_set_da_iss()
1159 long neon_element_offset(int reg, int element, MemOp memop) in neon_element_offset() argument
1161 int element_size = 1 << (memop & MO_SIZE); in neon_element_offset()
1185 void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop) in read_neon_element32() argument
1187 long off = neon_element_offset(reg, ele, memop); in read_neon_element32()
1189 switch (memop) { in read_neon_element32()
1211 void read_neon_element64(TCGv_i64 dest, int reg, int ele, MemOp memop) in read_neon_element64() argument
1213 long off = neon_element_offset(reg, ele, memop); in read_neon_element64()
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/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_init_ops.h619 struct ilt_line *line, u32 size, u8 memop) in bnx2x_ilt_line_mem_op() argument
621 if (memop == ILT_MEMOP_FREE) { in bnx2x_ilt_line_mem_op()
634 u8 memop) in bnx2x_ilt_client_mem_op() argument
650 ilt_cli->page_size, memop); in bnx2x_ilt_client_mem_op()
655 static int bnx2x_ilt_mem_op_cnic(struct bnx2x *bp, u8 memop) in bnx2x_ilt_mem_op_cnic() argument
660 rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_SRC, memop); in bnx2x_ilt_mem_op_cnic()
662 rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_TM, memop); in bnx2x_ilt_mem_op_cnic()
667 static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) in bnx2x_ilt_mem_op() argument
669 int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); in bnx2x_ilt_mem_op()
671 rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_QM, memop); in bnx2x_ilt_mem_op()
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/openbmc/qemu/target/sparc/
H A Dldst_helper.c579 int asi, uint32_t memop) in helper_ld_asi() argument
581 int size = 1 << (memop & MO_SIZE); in helper_ld_asi()
582 int sign = memop & MO_SIGN; in helper_ld_asi()
800 int asi, uint32_t memop) in helper_st_asi() argument
802 int size = 1 << (memop & MO_SIZE); in helper_st_asi()
1194 int asi, uint32_t memop) in helper_ld_asi() argument
1196 int size = 1 << (memop & MO_SIZE); in helper_ld_asi()
1197 int sign = memop & MO_SIGN; in helper_ld_asi()
1283 int asi, uint32_t memop) in helper_st_asi() argument
1285 int size = 1 << (memop & MO_SIZE); in helper_st_asi()
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H A Dtranslate.c1529 MemOp memop; member
1537 static DisasASI resolve_asi(DisasContext *dc, int asi, MemOp memop) in resolve_asi() argument
1750 memop = MO_UB; in resolve_asi()
1757 memop = MO_TEUW; in resolve_asi()
1763 memop ^= MO_BSWAP; in resolve_asi()
1769 return (DisasASI){ type, asi, mem_idx, memop }; in resolve_asi()
1795 tcg_gen_qemu_ld_tl(dst, addr, da->mem_idx, da->memop | MO_ALIGN); in gen_ld_asi()
1801 MemOpIdx oi = make_memop_idx(da->memop, da->mem_idx); in gen_ld_asi()
1815 TCGv_i32 r_mop = tcg_constant_i32(da->memop | MO_ALIGN); in gen_ld_asi()
1851 tcg_gen_qemu_st_tl(src, addr, da->mem_idx, da->memop | MO_ALIGN); in gen_st_asi()
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/openbmc/qemu/target/ppc/
H A Dtranslate.c2932 static void gen_load_locked(DisasContext *ctx, MemOp memop) in gen_load_locked() argument
2939 tcg_gen_qemu_ld_tl(gpr, t0, ctx->mem_idx, DEF_MEMOP(memop) | MO_ALIGN); in gen_load_locked()
2941 tcg_gen_movi_tl(cpu_reserve_length, memop_size(memop)); in gen_load_locked()
2945 #define LARX(name, memop) \ argument
2948 gen_load_locked(ctx, memop); \
2956 static void gen_fetch_inc_conditional(DisasContext *ctx, MemOp memop, in LARX()
2963 tcg_gen_qemu_ld_tl(t, EA, ctx->mem_idx, memop); in LARX()
2964 tcg_gen_addi_tl(t2, EA, memop_size(memop)); in LARX()
2965 tcg_gen_qemu_ld_tl(t2, t2, ctx->mem_idx, memop); in LARX()
2971 tcg_gen_qemu_st_tl(u, EA, ctx->mem_idx, memop); in LARX()
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/openbmc/qemu/target/arm/
H A Dptw.c78 MMUAccessType access_type, MemOp memop,
84 MMUAccessType access_type, MemOp memop,
1685 MMUAccessType access_type, MemOp memop, in get_phys_addr_lpae() argument
2148 unsigned a_bits = memop_atomicity_bits(memop); in get_phys_addr_lpae()
3311 MMUAccessType access_type, MemOp memop, in get_phys_addr_twostage() argument
3324 memop, result, fi); in get_phys_addr_twostage()
3351 memop, result, fi); in get_phys_addr_twostage()
3418 MMUAccessType access_type, MemOp memop, in get_phys_addr_nogpc() argument
3481 memop, result, fi); in get_phys_addr_nogpc()
3545 memop, result, fi); in get_phys_addr_nogpc()
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/openbmc/qemu/include/hw/core/
H A Dtcg-cpu-ops.h159 MemOp memop, int size, bool probe, uintptr_t ra);
/openbmc/linux/arch/x86/kvm/
H A Demulate.c1306 ctxt->memop.addr.mem.ea = (u32)ctxt->memop.addr.mem.ea; in decode_modrm()
3768 return segmented_write_std(ctxt, ctxt->memop.addr.mem, &fx_state, in em_fxsave()
3803 rc = segmented_read_std(ctxt, ctxt->memop.addr.mem, &fx_state, size); in em_fxrstor()
4607 ctxt->memop.bytes = (ctxt->d & ByteOp) ? 1 : ctxt->op_bytes; in decode_operand()
4609 *op = ctxt->memop; in decode_operand()
4616 ctxt->memop.bytes = (ctxt->op_bytes == 8) ? 16 : 8; in decode_operand()
4678 ctxt->memop.bytes = 1; in decode_operand()
4679 if (ctxt->memop.type == OP_REG) { in decode_operand()
4680 ctxt->memop.addr.reg = decode_register(ctxt, in decode_operand()
4682 fetch_register_operand(&ctxt->memop); in decode_operand()
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/openbmc/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc66 MemOp memop)
68 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE);
70 switch ((unsigned)memop) {
99 MemOp memop)
101 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE);
103 switch (memop) {
126 MemOp memop)
128 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE);
130 switch (memop) {
149 MemOp memop)
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/openbmc/qemu/target/hppa/
H A Dcpu.h368 MemOp memop, int size, bool probe, uintptr_t ra);

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