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Searched refs:SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1265 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro
H A Dsdma0_4_0_sh_mask.h1273 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
H A Dsdma0_4_2_sh_mask.h1279 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro
H A Dsdma0_4_2_2_sh_mask.h1289 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h1710 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h2032 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h1061 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h1059 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro
H A Dgc_10_3_0_sh_mask.h1072 #define SDMA0_GFX_MIDCMD_DATA5__DATA5__SHIFT macro