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Searched refs:AR71XX_GPIO_REG_OE (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/board/qca/ap121/
H A Dap121.c27 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
30 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
/openbmc/u-boot/board/qca/ap143/
H A Dap143.c27 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
30 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
/openbmc/u-boot/board/tplink/wdr4300/
H A Dwdr4300.c24 clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22)); in wdr4300_usb_start()
45 writel(0x3031b, regs + AR71XX_GPIO_REG_OE); in wdr4300_pinmux_config()
/openbmc/u-boot/drivers/pinctrl/ath79/
H A Dpinctrl_ar933x.c29 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_ar933x_spi_config()
43 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_ar933x_uart_config()
H A Dpinctrl_qca953x.c29 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_qca953x_spi_config()
55 clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE, in pinctrl_qca953x_uart_config()
/openbmc/linux/drivers/gpio/
H A Dgpio-ath79.c19 #define AR71XX_GPIO_REG_OE 0x00 macro
269 oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE, in ath79_gpio_probe()
270 oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL, in ath79_gpio_probe()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h958 #define AR71XX_GPIO_REG_OE 0x00 macro
/openbmc/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h917 #define AR71XX_GPIO_REG_OE 0x00 macro