1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a79d0643SWills Wang /*
3a79d0643SWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4a79d0643SWills Wang */
5a79d0643SWills Wang
6a79d0643SWills Wang #include <common.h>
7a79d0643SWills Wang #include <dm.h>
8a79d0643SWills Wang #include <errno.h>
9a79d0643SWills Wang #include <asm/io.h>
10a79d0643SWills Wang #include <dm/pinctrl.h>
11a79d0643SWills Wang #include <mach/ar71xx_regs.h>
12a79d0643SWills Wang
13a79d0643SWills Wang DECLARE_GLOBAL_DATA_PTR;
14a79d0643SWills Wang
15a79d0643SWills Wang enum periph_id {
16a79d0643SWills Wang PERIPH_ID_UART0,
17a79d0643SWills Wang PERIPH_ID_SPI0,
18a79d0643SWills Wang PERIPH_ID_NONE = -1,
19a79d0643SWills Wang };
20a79d0643SWills Wang
21a79d0643SWills Wang struct ar933x_pinctrl_priv {
22a79d0643SWills Wang void __iomem *regs;
23a79d0643SWills Wang };
24a79d0643SWills Wang
pinctrl_ar933x_spi_config(struct ar933x_pinctrl_priv * priv,int cs)25a79d0643SWills Wang static void pinctrl_ar933x_spi_config(struct ar933x_pinctrl_priv *priv, int cs)
26a79d0643SWills Wang {
27a79d0643SWills Wang switch (cs) {
28a79d0643SWills Wang case 0:
29a79d0643SWills Wang clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE,
30a79d0643SWills Wang AR933X_GPIO(4), AR933X_GPIO(3) |
31a79d0643SWills Wang AR933X_GPIO(5) | AR933X_GPIO(2));
32a79d0643SWills Wang setbits_be32(priv->regs + AR71XX_GPIO_REG_FUNC,
33a79d0643SWills Wang AR933X_GPIO_FUNC_SPI_EN |
34a79d0643SWills Wang AR933X_GPIO_FUNC_RES_TRUE);
35a79d0643SWills Wang break;
36a79d0643SWills Wang }
37a79d0643SWills Wang }
38a79d0643SWills Wang
pinctrl_ar933x_uart_config(struct ar933x_pinctrl_priv * priv,int uart_id)39a79d0643SWills Wang static void pinctrl_ar933x_uart_config(struct ar933x_pinctrl_priv *priv, int uart_id)
40a79d0643SWills Wang {
41a79d0643SWills Wang switch (uart_id) {
42a79d0643SWills Wang case PERIPH_ID_UART0:
43a79d0643SWills Wang clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE,
44a79d0643SWills Wang AR933X_GPIO(9), AR933X_GPIO(10));
45a79d0643SWills Wang setbits_be32(priv->regs + AR71XX_GPIO_REG_FUNC,
46a79d0643SWills Wang AR933X_GPIO_FUNC_UART_EN |
47a79d0643SWills Wang AR933X_GPIO_FUNC_RES_TRUE);
48a79d0643SWills Wang break;
49a79d0643SWills Wang }
50a79d0643SWills Wang }
51a79d0643SWills Wang
ar933x_pinctrl_request(struct udevice * dev,int func,int flags)52a79d0643SWills Wang static int ar933x_pinctrl_request(struct udevice *dev, int func, int flags)
53a79d0643SWills Wang {
54a79d0643SWills Wang struct ar933x_pinctrl_priv *priv = dev_get_priv(dev);
55a79d0643SWills Wang
56a79d0643SWills Wang debug("%s: func=%x, flags=%x\n", __func__, func, flags);
57a79d0643SWills Wang switch (func) {
58a79d0643SWills Wang case PERIPH_ID_SPI0:
59a79d0643SWills Wang pinctrl_ar933x_spi_config(priv, flags);
60a79d0643SWills Wang break;
61a79d0643SWills Wang case PERIPH_ID_UART0:
62a79d0643SWills Wang pinctrl_ar933x_uart_config(priv, func);
63a79d0643SWills Wang break;
64a79d0643SWills Wang default:
65a79d0643SWills Wang return -EINVAL;
66a79d0643SWills Wang }
67a79d0643SWills Wang
68a79d0643SWills Wang return 0;
69a79d0643SWills Wang }
70a79d0643SWills Wang
ar933x_pinctrl_get_periph_id(struct udevice * dev,struct udevice * periph)71a79d0643SWills Wang static int ar933x_pinctrl_get_periph_id(struct udevice *dev,
72a79d0643SWills Wang struct udevice *periph)
73a79d0643SWills Wang {
74a79d0643SWills Wang u32 cell[2];
75a79d0643SWills Wang int ret;
76a79d0643SWills Wang
77e160f7d4SSimon Glass ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
78a79d0643SWills Wang "interrupts", cell, ARRAY_SIZE(cell));
79a79d0643SWills Wang if (ret < 0)
80a79d0643SWills Wang return -EINVAL;
81a79d0643SWills Wang
82a79d0643SWills Wang switch (cell[0]) {
83a79d0643SWills Wang case 128:
84a79d0643SWills Wang return PERIPH_ID_UART0;
85a79d0643SWills Wang case 129:
86a79d0643SWills Wang return PERIPH_ID_SPI0;
87a79d0643SWills Wang }
88a79d0643SWills Wang return -ENOENT;
89a79d0643SWills Wang }
90a79d0643SWills Wang
ar933x_pinctrl_set_state_simple(struct udevice * dev,struct udevice * periph)91a79d0643SWills Wang static int ar933x_pinctrl_set_state_simple(struct udevice *dev,
92a79d0643SWills Wang struct udevice *periph)
93a79d0643SWills Wang {
94a79d0643SWills Wang int func;
95a79d0643SWills Wang
96a79d0643SWills Wang func = ar933x_pinctrl_get_periph_id(dev, periph);
97a79d0643SWills Wang if (func < 0)
98a79d0643SWills Wang return func;
99a79d0643SWills Wang return ar933x_pinctrl_request(dev, func, 0);
100a79d0643SWills Wang }
101a79d0643SWills Wang
102a79d0643SWills Wang static struct pinctrl_ops ar933x_pinctrl_ops = {
103a79d0643SWills Wang .set_state_simple = ar933x_pinctrl_set_state_simple,
104a79d0643SWills Wang .request = ar933x_pinctrl_request,
105a79d0643SWills Wang .get_periph_id = ar933x_pinctrl_get_periph_id,
106a79d0643SWills Wang };
107a79d0643SWills Wang
ar933x_pinctrl_probe(struct udevice * dev)108a79d0643SWills Wang static int ar933x_pinctrl_probe(struct udevice *dev)
109a79d0643SWills Wang {
110a79d0643SWills Wang struct ar933x_pinctrl_priv *priv = dev_get_priv(dev);
111a79d0643SWills Wang fdt_addr_t addr;
112a79d0643SWills Wang
113a821c4afSSimon Glass addr = devfdt_get_addr(dev);
114a79d0643SWills Wang if (addr == FDT_ADDR_T_NONE)
115a79d0643SWills Wang return -EINVAL;
116a79d0643SWills Wang
117a79d0643SWills Wang priv->regs = map_physmem(addr,
118a79d0643SWills Wang AR71XX_GPIO_SIZE,
119a79d0643SWills Wang MAP_NOCACHE);
120a79d0643SWills Wang return 0;
121a79d0643SWills Wang }
122a79d0643SWills Wang
123a79d0643SWills Wang static const struct udevice_id ar933x_pinctrl_ids[] = {
124a79d0643SWills Wang { .compatible = "qca,ar933x-pinctrl" },
125a79d0643SWills Wang { }
126a79d0643SWills Wang };
127a79d0643SWills Wang
128a79d0643SWills Wang U_BOOT_DRIVER(pinctrl_ar933x) = {
129a79d0643SWills Wang .name = "pinctrl_ar933x",
130a79d0643SWills Wang .id = UCLASS_PINCTRL,
131a79d0643SWills Wang .of_match = ar933x_pinctrl_ids,
132a79d0643SWills Wang .priv_auto_alloc_size = sizeof(struct ar933x_pinctrl_priv),
133a79d0643SWills Wang .ops = &ar933x_pinctrl_ops,
134a79d0643SWills Wang .probe = ar933x_pinctrl_probe,
135a79d0643SWills Wang };
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