/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_flow.h | 74 int ddr3_tip_bus_read_modify_write(u32 dev_num, 88 int ddr3_tip_adjust_dqs(u32 dev_num); 89 int ddr3_tip_init_controller(u32 dev_num); 95 int mv_ddr_rl_dqs_burst(u32 dev_num, u32 if_id, u32 freq); 96 int ddr3_tip_legacy_dynamic_read_leveling(u32 dev_num); 98 int ddr3_tip_legacy_dynamic_write_leveling(u32 dev_num); 100 int ddr3_tip_dynamic_write_leveling_supp(u32 dev_num); 101 int ddr3_tip_static_init_controller(u32 dev_num); 102 int ddr3_tip_configure_phy(u32 dev_num); 113 int ddr3_tip_write_cs_result(u32 dev_num, u32 offset); [all …]
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H A D | ddr3_training.c | 1382 config_func_info[dev_num].tip_set_freq_divider_func(dev_num, if_id, in ddr3_tip_freq_set() 2037 (u8)dev_num, if_id, freq); in ddr3_tip_ddr3_training_main_flow() 2052 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2065 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2098 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2113 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2160 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2181 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2223 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() 2463 ddr3_tip_reg_dump(dev_num); in ddr3_tip_ddr3_training_main_flow() [all …]
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H A D | ddr3_training_ip_prv_if.h | 31 u8 dev_num, enum mv_ddr_freq freq, 34 u8 dev_num, struct ddr3_device_info *info_ptr); 38 u8 dev_num, u32 if_id, enum mv_ddr_freq freq); 54 u32 dev_num, enum hws_algo_type algo_type); 59 u32 dev_num, struct init_cntr_param *init_cntr_prm); 63 u32 dev_num, int enable); 65 u32 dev_num, struct mv_ddr_topology_map *tm); 67 u32 dev_num, enum mv_ddr_freq frequency, 109 int ddr3_tip_init_config_func(u32 dev_num, 111 int ddr3_tip_register_xsb_info(u32 dev_num, [all …]
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H A D | ddr3_training_leveling.c | 219 (dev_num, in ddr3_tip_dynamic_read_leveling() 277 ddr3_tip_bus_write(dev_num, in ddr3_tip_dynamic_read_leveling() 299 (dev_num, if_id)); in ddr3_tip_dynamic_read_leveling() 585 (dev_num, in ddr3_tip_dynamic_per_bit_read_leveling() 602 (dev_num, in ddr3_tip_dynamic_per_bit_read_leveling() 658 (dev_num, in ddr3_tip_dynamic_per_bit_read_leveling() 751 (dev_num, if_id)); in ddr3_tip_dynamic_per_bit_read_leveling() 976 (dev_num, in ddr3_tip_dynamic_write_leveling() 1080 dev_num, in ddr3_tip_dynamic_write_leveling() 1095 (dev_num, in ddr3_tip_dynamic_write_leveling() [all …]
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H A D | ddr3_debug.c | 111 int ddr3_tip_reg_dump(u32 dev_num) in ddr3_tip_reg_dump() argument 142 (dev_num, if_id, in ddr3_tip_reg_dump() 153 (dev_num, if_id, in ddr3_tip_reg_dump() 195 return config_func_info[dev_num]. in ddr3_tip_get_device_info() 298 int print_device_info(u8 dev_num) in print_device_info() argument 372 ddr3_tip_reg_dump(dev_num); in ddr3_tip_print_log() 844 (dev_num, if_id, in ddr3_tip_print_adll() 1023 (dev_num, in ddr3_tip_run_sweep_test() 1081 print_adll(dev_num, ctrl_adll); in ddr3_tip_run_sweep_test() 1275 print_adll(dev_num, ctrl_adll); in ddr3_tip_run_leveling_sweep_test() [all …]
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H A D | ddr3_training_ip_engine.c | 514 (dev_num, access_type, in ddr3_tip_ip_training() 610 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 616 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 794 (dev_num, in ddr3_tip_read_training_result() 1179 (dev_num, if_id, in ddr3_tip_ip_training_wrapper() 1275 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_ip_training_wrapper() 1312 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_ip_training_wrapper() 1470 (dev_num, if_id, in ddr3_tip_load_phy_values() 1477 (dev_num, if_id, in ddr3_tip_load_phy_values() 1484 (dev_num, if_id, in ddr3_tip_load_phy_values() [all …]
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H A D | ddr3_training_ip_bist.h | 35 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id, 37 int ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern, 44 int hws_ddr3_run_bist(u32 dev_num, enum hws_pattern pattern, u32 *result, 46 int ddr3_tip_run_sweep_test(int dev_num, u32 repeat_num, u32 direction, 48 int ddr3_tip_run_leveling_sweep_test(int dev_num, u32 repeat_num, 50 int ddr3_tip_print_regs(u32 dev_num); 51 int ddr3_tip_reg_dump(u32 dev_num); 52 int run_xsb_test(u32 dev_num, u32 mem_addr, u32 write_type, u32 read_type,
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H A D | ddr3_training_centralization.c | 32 int ddr3_tip_centralization_rx(u32 dev_num) in ddr3_tip_centralization_rx() argument 144 (dev_num, if_id, in ddr3_tip_centralization() 438 ddr3_tip_bus_read(dev_num, if_id, in ddr3_tip_centralization() 460 ddr3_tip_bus_write(dev_num, in ddr3_tip_centralization() 494 int ddr3_tip_special_rx(u32 dev_num) in ddr3_tip_special_rx() argument 555 (dev_num, if_id, in ddr3_tip_special_rx() 624 (dev_num, if_id, in ddr3_tip_special_rx() 632 (dev_num, in ddr3_tip_special_rx() 648 (dev_num, if_id, in ddr3_tip_special_rx() 661 (dev_num, if_id, in ddr3_tip_special_rx() [all …]
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H A D | ddr3_training_hw_algo.c | 77 (dev_num, if_id, in ddr3_tip_write_additional_odt_setting() 201 (dev_num, if_id, in ddr3_tip_vref() 375 (dev_num, if_id, in ddr3_tip_vref() 381 (dev_num, in ddr3_tip_vref() 490 (dev_num, if_id, in ddr3_tip_vref() 496 (dev_num, in ddr3_tip_vref() 533 (dev_num, if_id, in ddr3_tip_vref() 539 (dev_num, in ddr3_tip_vref() 563 (dev_num, if_id, in ddr3_tip_vref() 569 (dev_num, in ddr3_tip_vref() [all …]
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H A D | ddr3_training_pbs.c | 103 (dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_pbs() 250 (dev_num, in ddr3_tip_pbs() 260 (dev_num, in ddr3_tip_pbs() 280 (dev_num, in ddr3_tip_pbs() 290 (dev_num, in ddr3_tip_pbs() 492 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_pbs() 499 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_pbs() 514 ddr3_tip_ip_training(dev_num, in ddr3_tip_pbs() 530 (dev_num, in ddr3_tip_pbs() 633 (dev_num, in ddr3_tip_pbs() [all …]
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H A D | ddr3_init.h | 143 int ddr3_tip_enable_init_sequence(u32 dev_num); 152 int ddr3_tip_reg_write(u32 dev_num, u32 reg_addr, u32 data); 153 int ddr3_tip_reg_read(u32 dev_num, u32 reg_addr, u32 *data, u32 reg_mask); 156 int print_adll(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM]); 157 int print_ph(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM]); 158 int read_phase_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], 160 int write_leveling_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], 162 int ddr3_tip_restore_dunit_regs(u32 dev_num); 170 int ddr3_tip_tune_training_params(u32 dev_num, 179 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode); [all …]
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H A D | mv_ddr_plat.c | 190 static u32 ddr3_ctrl_get_junc_temp(u8 dev_num) in ddr3_ctrl_get_junc_temp() argument 659 ddr3_tip_init_config_func(dev_num, &config_func); in mv_ddr_sw_db_init() 664 ddr3_tip_dev_attr_init(dev_num); in mv_ddr_sw_db_init() 1371 int ddr3_tip_configure_phy(u32 dev_num) in ddr3_tip_configure_phy() argument 1378 (dev_num, ACCESS_TYPE_MULTICAST, PARAM_NOT_CARE, in ddr3_tip_configure_phy() 1383 (dev_num, ACCESS_TYPE_MULTICAST, PARAM_NOT_CARE, in ddr3_tip_configure_phy() 1388 (dev_num, ACCESS_TYPE_MULTICAST, PARAM_NOT_CARE, in ddr3_tip_configure_phy() 1393 (dev_num, ACCESS_TYPE_MULTICAST, PARAM_NOT_CARE, in ddr3_tip_configure_phy() 1399 (dev_num, ACCESS_TYPE_MULTICAST, PARAM_NOT_CARE, in ddr3_tip_configure_phy() 1421 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_configure_phy() [all …]
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H A D | ddr3_training_ip_centralization.h | 9 int ddr3_tip_centralization_tx(u32 dev_num); 10 int ddr3_tip_centralization_rx(u32 dev_num); 11 int ddr3_tip_print_centralization_result(u32 dev_num); 12 int ddr3_tip_special_rx(u32 dev_num);
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H A D | ddr3_training_ip_engine.h | 33 int ddr3_tip_training_ip_test(u32 dev_num, enum hws_training_result result_type, 40 int ddr3_tip_load_pattern_to_mem(u32 dev_num, enum hws_pattern pattern); 41 int ddr3_tip_load_all_pattern_to_mem(u32 dev_num); 42 int ddr3_tip_read_training_result(u32 dev_num, u32 if_id, 52 int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type, 63 int ddr3_tip_ip_training_wrapper(u32 dev_num, enum hws_access_type access_type,
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H A D | ddr3_training_ip.h | 136 int ddr3_tip_register_dq_table(u32 dev_num, u32 *table); 137 int hws_ddr3_tip_select_ddr_controller(u32 dev_num, int enable); 138 int hws_ddr3_tip_init_controller(u32 dev_num, 140 int hws_ddr3_tip_load_topology_map(u32 dev_num, 142 int hws_ddr3_tip_run_alg(u32 dev_num, enum hws_algo_type algo_type);
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H A D | ddr3_training_hw_algo.h | 9 int ddr3_tip_vref(u32 dev_num); 10 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id); 11 int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap);
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H A D | ddr3_training_ip_pbs.h | 36 int ddr3_tip_pbs_rx(u32 dev_num); 37 int ddr3_tip_print_all_pbs_result(u32 dev_num); 38 int ddr3_tip_pbs_tx(u32 dev_num);
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H A D | ddr3_training_bist.c | 12 static int ddr3_tip_bist_operation(u32 dev_num, 20 int ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern, in ddr3_tip_bist_activate() argument 74 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id, in ddr3_tip_bist_read_result() argument 86 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_bist_read_result() 92 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_bist_read_result() 99 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_bist_read_result() 105 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_bist_read_result() 130 ret = ddr3_tip_bist_activate(dev_num, pattern, in hws_ddr3_run_bist() 141 ret = ddr3_tip_bist_activate(dev_num, pattern, in hws_ddr3_run_bist() 167 static int ddr3_tip_bist_operation(u32 dev_num, in ddr3_tip_bist_operation() argument [all …]
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/openbmc/linux/drivers/cdx/controller/ |
H A D | cdx_controller.c | 50 u8 bus_num, u8 dev_num, in cdx_configure_device() argument 57 ret = cdx_mcdi_reset_device(cdx->priv, bus_num, dev_num); in cdx_configure_device() 69 u8 bus_num, dev_num, num_cdx_bus; in cdx_scan_devices() local 93 for (dev_num = 0; dev_num < num_cdx_dev; dev_num++) { in cdx_scan_devices() 98 dev_num, &dev_params); in cdx_scan_devices() 102 bus_num, dev_num, ret); in cdx_scan_devices() 111 dev_num, ret); in cdx_scan_devices() 116 dev_num, bus_num); in cdx_scan_devices()
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H A D | mcdi_functions.c | 49 u8 bus_num, u8 dev_num, in cdx_mcdi_get_dev_config() argument 60 MCDI_SET_DWORD(inbuf, CDX_BUS_GET_DEVICE_CONFIG_IN_DEVICE, dev_num); in cdx_mcdi_get_dev_config() 71 dev_params->dev_num = dev_num; in cdx_mcdi_get_dev_config() 127 int cdx_mcdi_reset_device(struct cdx_mcdi *cdx, u8 bus_num, u8 dev_num) in cdx_mcdi_reset_device() argument 133 MCDI_SET_DWORD(inbuf, CDX_DEVICE_RESET_IN_DEVICE, dev_num); in cdx_mcdi_reset_device()
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/openbmc/u-boot/include/ |
H A D | netdev.h | 29 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num); 32 int cs8900_initialize(u8 dev_num, int base_addr); 40 int ep93xx_eth_initialize(u8 dev_num, int base_addr); 42 int ethoc_initialize(u8 dev_num, int base_addr); 49 int ks8851_mll_initialize(u8 dev_num, int base_addr); 50 int lan91c96_initialize(u8 dev_num, int base_addr); 68 int smc91111_initialize(u8 dev_num, int base_addr); 69 int smc911x_initialize(u8 dev_num, int base_addr);
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/openbmc/linux/drivers/soundwire/ |
H A D | bus.c | 364 msg->dev_num = dev_num; in sdw_fill_msg() 752 int ret, dev_num; in sdw_assign_device_num() local 763 dev_num); in sdw_assign_device_num() 764 return dev_num; in sdw_assign_device_num() 766 slave->dev_num = dev_num; in sdw_assign_device_num() 777 slave->dev_num); in sdw_assign_device_num() 780 dev_num = slave->dev_num; in sdw_assign_device_num() 786 dev_num, ret); in sdw_assign_device_num() 933 slave->dev_num); in sdw_modify_slave_status() 1023 dev_num); in sdw_bus_wait_for_clk_prep_deprep() [all …]
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/openbmc/linux/tools/iio/ |
H A D | iio_generic_buffer.c | 360 int dev_num = -1, trig_num = -1; in main() local 424 dev_num = strtoul(optarg, &dummy, 10); in main() 455 if (dev_num < 0 && !device_name) { in main() 460 } else if (dev_num >= 0 && device_name) { in main() 465 } else if (dev_num < 0) { in main() 466 dev_num = find_type_by_name(device_name, "iio:device"); in main() 467 if (dev_num < 0) { in main() 469 ret = dev_num; in main() 473 printf("iio device number being used is %d\n", dev_num); in main() 516 "%s-dev%d", device_name, dev_num); in main() [all …]
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/openbmc/linux/drivers/net/ethernet/marvell/prestera/ |
H A D | prestera_dsa.c | 86 u32 dev_num = dsa->hw_dev_num; in prestera_dsa_build() local 91 words[0] |= FIELD_PREP(PRESTERA_DSA_W0_DEV_NUM, dev_num); in prestera_dsa_build() 92 dev_num = FIELD_GET(PRESTERA_DSA_DEV_NUM, dev_num); in prestera_dsa_build() 93 words[3] |= FIELD_PREP(PRESTERA_DSA_W3_DEV_NUM, dev_num); in prestera_dsa_build()
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/openbmc/u-boot/drivers/dfu/ |
H A D | dfu_mmc.c | 29 mmc = find_mmc_device(dfu->data.mmc.dev_num); in mmc_block_op() 31 pr_err("Device MMC %d - not found!", dfu->data.mmc.dev_num); in mmc_block_op() 53 dfu->data.mmc.dev_num, in mmc_block_op() 61 dfu->data.mmc.dev_num, blk_start, blk_count, buf); in mmc_block_op() 78 dfu->data.mmc.dev_num, in mmc_block_op() 85 dfu->data.mmc.dev_num, in mmc_block_op() 304 dfu->data.mmc.dev_num = simple_strtoul(devstr, NULL, 10); in dfu_fill_entity_mmc() 322 mmc = find_mmc_device(dfu->data.mmc.dev_num); in dfu_fill_entity_mmc() 325 dfu->data.mmc.dev_num); in dfu_fill_entity_mmc()
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