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Searched refs:cores (Results 351 – 375 of 412) sorted by relevance

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/openbmc/linux/drivers/clk/
H A DKconfig230 bool "Clock driver for BCLK of Freescale SAI cores"
/openbmc/openbmc/poky/documentation/brief-yoctoprojectqs/
H A Dindex.rst48 much RAM and as many CPU cores as possible is strongly recommended to
/openbmc/linux/drivers/usb/gadget/udc/
H A DKconfig115 Select this to support Aeroflex Gaisler GRUSBDC cores from the GRLIB
/openbmc/linux/drivers/char/
H A DKconfig119 between several cores on a system
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi49 * bringing up secondary cores.
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5800-peach-pi.dts164 * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores
/openbmc/linux/drivers/edac/
H A DKconfig368 the cnMIPS cores of Cavium Octeon family SOCs.
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a.dtsi29 /* We have 2 clusters having 4 Cortex-A53 cores each */
/openbmc/linux/arch/x86/
H A DKconfig.cpu354 # the right-hand clause are the cores that benefit from this optimization.
H A DKconfig558 enable more than ~168 cores.
1065 certain cores to reach higher turbo frequencies (when running
1069 the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the
1324 of synchronizing all cores and SMT threads is one fragile dance which does
1325 not guarantee that cores might not softlock after the loading. Therefore,
/openbmc/linux/arch/loongarch/
H A DKconfig501 Not all LoongArch cores support h/w unaligned access, we can use
/openbmc/openbmc/poky/documentation/migration-guides/
H A Drelease-notes-3.4.rst130 - qemu: use 4 cores in qemu guests
/openbmc/qemu/hw/intc/
H A Dpnv_xive.c486 PnvCore *pc = chip->cores[i]; in pnv_xive_match_nvt()
H A Dpnv_xive2.c477 PnvCore *pc = chip->cores[i]; in pnv_xive2_match_nvt()
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml19 dynamically, where cores can be put in different low-power states (ranging
/openbmc/openbmc/poky/bitbake/doc/bitbake-user-manual/
H A Dbitbake-user-manual-ref-variables.rst491 number of threads is equal to the number of cores on the system.
495 time. If your host development system supports multiple cores, a good
496 rule of thumb is to set this variable to twice the number of cores.
/openbmc/openbmc/meta-security/recipes-ids/suricata/files/
H A Dsuricata.yaml10 # conservative 1024. A higher number will make sure CPU's/CPU cores will be
427 # to specific CPU's/CPU cores. In this case all threads are tied to CPU0,
/openbmc/u-boot/arch/arm/dts/
H A Dimx6sx.dtsi1298 cores = <&gpu>;
H A Dr8a7794.dtsi369 /* The memory map in the User's Manual maps the cores to
/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dixgbe.rst318 - Matches flows and CPU cores for flow affinity.
/openbmc/linux/arch/s390/
H A DKconfig504 multiple cores or multiple books.
/openbmc/linux/Documentation/gpu/
H A Ddrm-uapi.rst398 of 1GB of RAM and four cores.
/openbmc/linux/tools/perf/Documentation/
H A Dperf-stat.txt321 is a useful mode to detect imbalance between physical cores. To enable this mode,
/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight.rst468 amount of processor cores), the "cs_etm" PMU will be listed only once.
/openbmc/u-boot/arch/x86/
H A DKconfig745 cores. In most cases there are some LAPICs (local) for each core and

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