| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | at91-sama5d3_eds.dts | 211 /* Reserved for reset signal to the RGMII connector. */
217 /* Reserved for an interrupt line from the RMII and RGMII connectors. */
|
| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1028a-kontron-sl28-var1.dts | 7 * port is connected via RGMII. This port is not TSN aware.
|
| /openbmc/u-boot/board/freescale/ls1021aiot/ |
| H A D | README | 17 - One Gbit Etherent RGMII interface to 4-ports switch
|
| /openbmc/linux/arch/mips/ralink/ |
| H A D | Kconfig | 65 dual-core CPU, a 5-port 10/100/1000 switch/PHY and one RGMII.
|
| /openbmc/u-boot/board/freescale/ls1021aqds/ |
| H A D | README | 41 - MII, RMII, RGMII, and SGMII support
86 - Three on-board RGMII 10/100/1G ethernet ports.
|
| /openbmc/u-boot/board/freescale/ls1021atwr/ |
| H A D | README | 41 - MII, RMII, RGMII, and SGMII support
85 - Three on-board RGMII 10/100/1G ethernet ports.
|
| /openbmc/openbmc/meta-ingrasys/meta-zaius/recipes-bsp/u-boot/u-boot-aspeed/ |
| H A D | 0001-board-aspeed-Add-reset_phy-for-Zaius.patch | 6 The Broadcom PHY for the Zaius BMC requires a hard reset after RGMII
|
| /openbmc/linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxl-s905d-p230.dts | 71 /* External PHY is in RGMII */
|
| H A D | meson-gxbb-odroidc2.dts | 290 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
292 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
|
| /openbmc/linux/Documentation/networking/ |
| H A D | phy.rst | 72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
95 Whenever possible, use the PHY side RGMII delay for these reasons:
119 required delays, as defined per the RGMII standard, several options may be
124 option to insert the expected 2ns RGMII delay.
129 Common problems with RGMII delay mismatch
132 When there is a RGMII delay mismatch between the Ethernet MAC and the PHY, this
205 RGMII, and SGMII. See "PHY interface mode" below. For a full
547 RGMII v1.3:
550 RGMII v2.0:
|
| /openbmc/u-boot/board/freescale/t208xrdb/ |
| H A D | README | 59 - Two on-board 10M/100M/1G RGMII ethernet ports
135 ETH4 FM1@DTSEC3 fm1-mac3 0xfe4e4000 1G RGMII (RTL8211E)
136 ETH5 FM1@DTSEC4 fm1-mac4 0xfe4e6000 1G RGMII (RTL8211E)
|
| /openbmc/linux/Documentation/networking/dsa/ |
| H A D | bcm_sf2.rst | 19 - several external MII/RevMII/GMII/RGMII interfaces
105 - turning off RGMII data processing logic when the link goes down
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | meson-gxbb-odroidc2.dts | 202 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
204 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
|
| H A D | meson-gxbb-nanopi-k2.dts | 206 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
208 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
|
| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | nxp,dwmac-imx.yaml | 45 - description: MAC RGMII TX clock
|
| H A D | ti,dp83822.yaml | 18 connect to a MAC through a standard MII, RMII, or RGMII interface
|
| H A D | microchip,lan966x-switch.yaml | 15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
|
| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | fsp2.dts | 538 rgmii-device = <&RGMII>;
564 rgmii-device = <&RGMII>;
568 RGMII: rgmii@b0000600 { label
|
| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6qdl-wandboard-revd1.dtsi | 147 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f0b1 /* RGMII PHY reset */
|
| H A D | imx6qp-prtwd3.dts | 460 /* Configure clock provider for RGMII ref clock */
462 /* Configure clock consumer for RGMII ref clock */
|
| /openbmc/u-boot/drivers/net/phy/ |
| H A D | Kconfig | 145 is supported through the 'mdio' command and any RGMII signal
225 connection (MII, RGMII, ...).
|
| /openbmc/u-boot/drivers/net/ |
| H A D | Kconfig | 216 Interface (RGMII) interfaces. It adopts an AHB bus interface
285 config RGMII config
286 bool "Enable RGMII"
289 Interface (RGMII).
|
| H A D | fec_mxc.h | 234 RGMII, /* RGMII */ enumerator
|
| /openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | brcm,sf2.yaml | 67 description: maximum number of RGMII interfaces supported by the switch
|
| /openbmc/u-boot/board/freescale/t102xrdb/ |
| H A D | README | 35 - Two RGMII interfaces
79 - Two on-board 10M/100M/1G bps RGMII ethernet ports
110 - one 1G RGMII port on-board(RTL8211FS PHY)
|