1e314a07eSJoakim Zhang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2e314a07eSJoakim Zhang%YAML 1.2 3e314a07eSJoakim Zhang--- 4e314a07eSJoakim Zhang$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# 5e314a07eSJoakim Zhang$schema: http://devicetree.org/meta-schemas/core.yaml# 6e314a07eSJoakim Zhang 7b2274ffeSClark Wangtitle: NXP i.MX8/9 DWMAC glue layer 8e314a07eSJoakim Zhang 9e314a07eSJoakim Zhangmaintainers: 10fb21cad2SFlorian Fainelli - Clark Wang <xiaoning.wang@nxp.com> 11fb21cad2SFlorian Fainelli - Shawn Guo <shawnguo@kernel.org> 12fb21cad2SFlorian Fainelli - NXP Linux Team <linux-imx@nxp.com> 13e314a07eSJoakim Zhang 14e314a07eSJoakim Zhang# We need a select here so we don't match all nodes with 'snps,dwmac' 15e314a07eSJoakim Zhangselect: 16e314a07eSJoakim Zhang properties: 17e314a07eSJoakim Zhang compatible: 18e314a07eSJoakim Zhang contains: 19e314a07eSJoakim Zhang enum: 20e314a07eSJoakim Zhang - nxp,imx8mp-dwmac-eqos 21e314a07eSJoakim Zhang - nxp,imx8dxl-dwmac-eqos 22b2274ffeSClark Wang - nxp,imx93-dwmac-eqos 23e314a07eSJoakim Zhang required: 24e314a07eSJoakim Zhang - compatible 25e314a07eSJoakim Zhang 26e314a07eSJoakim ZhangallOf: 27*61ab5a06SKrzysztof Kozlowski - $ref: snps,dwmac.yaml# 28e314a07eSJoakim Zhang 29e314a07eSJoakim Zhangproperties: 30e314a07eSJoakim Zhang compatible: 31e314a07eSJoakim Zhang oneOf: 32e314a07eSJoakim Zhang - items: 33e314a07eSJoakim Zhang - enum: 34e314a07eSJoakim Zhang - nxp,imx8mp-dwmac-eqos 35e314a07eSJoakim Zhang - nxp,imx8dxl-dwmac-eqos 36b2274ffeSClark Wang - nxp,imx93-dwmac-eqos 37e314a07eSJoakim Zhang - const: snps,dwmac-5.10a 38e314a07eSJoakim Zhang 39e314a07eSJoakim Zhang clocks: 40e314a07eSJoakim Zhang minItems: 3 41e314a07eSJoakim Zhang items: 42e314a07eSJoakim Zhang - description: MAC host clock 43e314a07eSJoakim Zhang - description: MAC apb clock 44e314a07eSJoakim Zhang - description: MAC timer clock 45e314a07eSJoakim Zhang - description: MAC RGMII TX clock 46e314a07eSJoakim Zhang - description: EQOS MEM clock 47e314a07eSJoakim Zhang 48e314a07eSJoakim Zhang clock-names: 49e314a07eSJoakim Zhang minItems: 3 50e314a07eSJoakim Zhang maxItems: 5 51e314a07eSJoakim Zhang contains: 52e314a07eSJoakim Zhang enum: 53e314a07eSJoakim Zhang - stmmaceth 54e314a07eSJoakim Zhang - pclk 55e314a07eSJoakim Zhang - ptp_ref 56e314a07eSJoakim Zhang - tx 57e314a07eSJoakim Zhang - mem 58e314a07eSJoakim Zhang 59e314a07eSJoakim Zhang intf_mode: 60e314a07eSJoakim Zhang $ref: /schemas/types.yaml#/definitions/phandle-array 6139bd2b6aSRob Herring items: 6239bd2b6aSRob Herring - items: 6339bd2b6aSRob Herring - description: phandle to the GPR syscon 6439bd2b6aSRob Herring - description: the offset of the GPR register 65e314a07eSJoakim Zhang description: 66e314a07eSJoakim Zhang Should be phandle/offset pair. The phandle to the syscon node which 67e314a07eSJoakim Zhang encompases the GPR register, and the offset of the GPR register. 68e314a07eSJoakim Zhang 69e314a07eSJoakim Zhang snps,rmii_refclk_ext: 70e314a07eSJoakim Zhang $ref: /schemas/types.yaml#/definitions/flag 71e314a07eSJoakim Zhang description: 72e314a07eSJoakim Zhang To select RMII reference clock from external. 73e314a07eSJoakim Zhang 74e314a07eSJoakim Zhangrequired: 75e314a07eSJoakim Zhang - compatible 76e314a07eSJoakim Zhang - clocks 77e314a07eSJoakim Zhang - clock-names 78e314a07eSJoakim Zhang 79e314a07eSJoakim ZhangunevaluatedProperties: false 80e314a07eSJoakim Zhang 81e314a07eSJoakim Zhangexamples: 82e314a07eSJoakim Zhang - | 83e314a07eSJoakim Zhang #include <dt-bindings/interrupt-controller/arm-gic.h> 84e314a07eSJoakim Zhang #include <dt-bindings/interrupt-controller/irq.h> 85e314a07eSJoakim Zhang #include <dt-bindings/clock/imx8mp-clock.h> 86e314a07eSJoakim Zhang 87e314a07eSJoakim Zhang eqos: ethernet@30bf0000 { 88e314a07eSJoakim Zhang compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a"; 89e314a07eSJoakim Zhang reg = <0x30bf0000 0x10000>; 90e314a07eSJoakim Zhang interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 91e314a07eSJoakim Zhang <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 92e314a07eSJoakim Zhang interrupt-names = "macirq", "eth_wake_irq"; 93e314a07eSJoakim Zhang clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>, 94e314a07eSJoakim Zhang <&clk IMX8MP_CLK_QOS_ENET_ROOT>, 95e314a07eSJoakim Zhang <&clk IMX8MP_CLK_ENET_QOS_TIMER>, 96e314a07eSJoakim Zhang <&clk IMX8MP_CLK_ENET_QOS>; 97e314a07eSJoakim Zhang clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; 98e314a07eSJoakim Zhang phy-mode = "rgmii"; 99e314a07eSJoakim Zhang }; 100