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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7110-dwmac
21 - compatible
26 - enum:
27 - starfive,jh7110-dwmac
[all …]
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
/openbmc/linux/Documentation/accel/qaic/
H A Daic100.rst1 .. SPDX-License-Identifier: GPL-2.0-only
10 The Qualcomm Cloud AI 100/AIC100 family of products (including SA9000P - part of
16 (x8). An individual SoC on a card can have up to 16 NSPs for running workloads.
20 performance. AIC100 cards are multi-user capable and able to execute workloads
26 An AIC100 card consists of an AIC100 SoC, on-card DDR, and a set of misc
39 AIC100 implements MSI but does not implement MSI-X. AIC100 requires 17 MSIs to
43 hardware. AIC100 provides 3, 64-bit BARs.
51 configuration, but defaults to 64K. This BAR currently has no purpose.
53 From the host perspective, AIC100 has several key hardware components -
62 ---
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/openbmc/linux/lib/
H A Dtest_printf.c1 // SPDX-License-Identifier: GPL-2.0-only
79 written = min(bufsize-1, elen); in do_test()
81 pr_warn("vsnprintf(buf, %d, \"%s\", ...) did not nul-terminate buffer\n", in do_test()
86 if (memchr_inv(test_buffer + written + 1, FILL_CHAR, bufsize - (written + 1))) { in do_test()
87 pr_warn("vsnprintf(buf, %d, \"%s\", ...) wrote beyond the nul-terminator\n", in do_test()
92 if (memchr_inv(test_buffer + bufsize, FILL_CHAR, BUF_SIZE + PAD_SIZE - bufsize)) { in do_test()
152 /* Work around annoying "warning: zero-length gnu_printf format string". */ in test_basic()
164 test("0x1234abcd ", "%#-12x", 0x1234abcd); in test_number()
166 …test("0|001| 12|+123| 1234|-123|-1234", "%d|%03d|%3d|%+d|% d|%+d|% d", 0, 1, 12, 123, 1234, -123, … in test_number()
167 NOWARN(-Wformat, "Intentionally test narrowing conversion specifiers.", { in test_number()
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
106 return ERR_PTR(-ENOMEM); in stmmac_axi_setup()
109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); in stmmac_axi_setup()
[all …]
/openbmc/linux/drivers/net/ethernet/tehuti/
H A Dtehuti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming
16 * 2) RX Data Fifo - RXD - holds descriptors of full buffers. This Fifo is
23 * One holds 1.5K packets and another - 26K packets. Depending on incoming
30 * skb db - used to keep track of all skbs owned by SW and their dma addresses.
34 * fifo - keeps info about fifo's size and location, relevant HW registers,
42 * NIC sees that there is no RXF buffers and raises
45 * NAPI - interrupt-driven mixed with polling
46 * interrupt-driven only
48 * Interrupt-driven only flow is following. When buffer is ready, HW raises
[all …]
/openbmc/linux/include/linux/
H A Dstmmac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
58 #define STMMAC_CSR_I_4 0x8 /* clk_csr_i/4 */
93 int pbl; member
161 /* FPE link-partner hand-shaking mPacket type */
227 /* MAC ----- optional PCS ----- SerDes ----- optional PHY ----- Media
231 * mac_interface is the MAC-side interface, which may be the same
232 * as phy_interface if there is no intervening PCS. If there is a
238 /* phy_interface is the PHY-side interface - the interface used by
/openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/
H A Dlaw.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2008-2011 Freescale Semiconductor, Inc.
21 #define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
22 #define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
23 #define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
56 gd->arch.used_laws |= (1 << idx); in set_law()
68 gd->arch.used_laws &= ~(1 << idx); in disable_law()
90 e->addr = get_law_base_addr(i); in get_law_entry()
91 e->size = lawar & 0x3f; in get_law_entry()
92 e->trgt_id = (lawar >> 20) & 0xff; in get_law_entry()
[all …]
/openbmc/u-boot/include/configs/
H A DT4240QDS.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2012 Freescale Semiconductor, Inc.
35 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
49 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
93 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
199 FTIM2_GPCM_TCH(0x8) | \
217 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
310 #define I2C_MUX_CH_DEFAULT 0x8
331 * for slave u-boot IMAGE instored in master memory space,
351 * SRIO_PCIE_BOOT - SLAVE
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H A DT102xQDS.h1 /* SPDX-License-Identifier: GPL-2.0+ */
48 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
60 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
74 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
88 /* PCIe Boot - Master */
91 * for slave u-boot IMAGE instored in master memory space,
119 /* PCIe Boot - Slave */
148 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
298 FTIM2_GPCM_TCH(0x8) | \
318 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
[all …]
H A DB4860QDS.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2012 Freescale Semiconductor, Inc.
29 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
58 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
72 #define I2C_CH_DEFAULT 0x8
118 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
281 FTIM2_GPCM_TCH(0x8) | \
305 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
408 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
415 /* Serial Port - controlled on board with jumper J8
[all …]
H A DT208xRDB.h1 /* SPDX-License-Identifier: GPL-2.0+ */
49 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
61 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
75 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
129 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
236 FTIM2_GPCM_TCH(0x8) | \
254 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
340 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
379 #define I2C_MUX_CH_DEFAULT 0x8
403 * for slave u-boot IMAGE instored in master memory space,
[all …]
H A DT208xQDS.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
55 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
71 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
89 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
144 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
272 FTIM2_GPCM_TCH(0x8) | \
290 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
392 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
431 #define I2C_MUX_CH_DEFAULT 0x8
[all …]
H A DT102xRDB.h1 /* SPDX-License-Identifier: GPL-2.0+ */
51 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
67 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
85 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
103 /* PCIe Boot - Master */
106 * for slave u-boot IMAGE instored in master memory space,
134 /* PCIe Boot - Slave */
171 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
311 FTIM2_GPCM_TCH(0x8) | \
334 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
[all …]
/openbmc/linux/drivers/infiniband/hw/ocrdma/
H A Docrdma_sli.h3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
16 * - Redistributions of source code must retain the above copyright notice,
19 * - Redistributions in binary form must reproduce the above copyright
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
36 * linux-drivers@emulex.com
149 #define OCRDMA_DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
150 #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */
151 /* qid #2 msbits at 12-11 */
153 #define OCRDMA_DB_CQ_NUM_POPPED_SHIFT 16 /* bits 16 - 28 */
159 #define OCRDMA_EQ_ID_MASK 0x1FF /* bits 0 - 8 */
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
[all …]
/openbmc/u-boot/doc/
H A DREADME.b4860qds2 --------
6 -------------
7 The B4860 QorIQ Qonverge device is a Freescale high-end, multicore SoC based on
11 expanding wireless markets, such as 3GLTE (FDD and TDD), LTE-Advanced, and UMTS.
13 The B4860 is a highly-integrated StarCore and Power Architecture processor that
15 . Six fully-programmable StarCore SC3900 FVP subsystems, divided into three
16 clusters-each core runs up to 1.2 GHz, with an architecture highly optimized for
18 . Four dual-thread e6500 Power Architecture processors organized in one cluster-each
20 . Two DDR3/3L controllers for high-speed, industry-standard memory interface each
22 . MAPLE-B3 hardware acceleration-for forward error correction schemes including
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
[all …]
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/drivers/remoteproc/
H A Dqcom_q6v5_mss.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
53 /* PBL/MBA interface registers */
79 #define AXI_IDLE_REG 0x8
87 #define QACCEPT_DENY_REG 0x8
273 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
297 dev_err(qproc->dev, in q6v5_regulator_enable()
308 dev_err(qproc->dev, in q6v5_regulator_enable()
[all …]
/openbmc/linux/drivers/infiniband/hw/cxgb4/
H A Dt4fw_ri_api.h2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
17 * - Redistributions in binary form must reproduce the above
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
45 FW_RI_RDMA_INIT = 0x8, /* CHELSIO RI specific ... */
725 __u64 pbl[2]; member
H A Dt4.h2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
17 * - Redistributions in binary form must reproduce the above
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
43 #define T4_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */
49 __be32 rsvd1; /* flit 0 - hw owns */
54 u8 qp_err; /* flit 1 - sw owns */
70 #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \
72 #define T4_MAX_SEND_INLINE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \
74 #define T4_MAX_WRITE_INLINE ((T4_SQ_NUM_BYTES - \
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
[all …]
/openbmc/linux/drivers/scsi/
H A Dscsi_debug.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (C) 2001 - 2021 Douglas Gilbert
33 #include <linux/crc-t10dif.h>
39 #include <linux/t10-pi.h>
70 #define LOGICAL_UNIT_COMMUNICATION_FAILURE 0x8
143 #define DEF_SCSI_LEVEL 7 /* INQUIRY, byte2 [6->SPC-4; 7->SPC-5] */
157 #define JDELAY_OVERRIDDEN -9999
195 /* As indicated in SAM-5 and SPC-4 Unit Attentions (UAs) are returned in
217 * per-device DEF_CMD_PER_LUN can be changed via sysfs:
225 /* UA - Unit Attention; SA - Service Action; SSU - Start Stop Unit */
[all …]

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