Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4 |
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#
b643b836 |
| 16-Sep-2023 |
Rohan G Thomas <rohan.g.thomas@intel.com> |
net: stmmac: Tx coe sw fallback
[ Upstream commit 8452a05b2c633b708dbe3e742f71b24bf21fe42d ]
Add sw fallback of tx checksum calculation for those tx queues that don't support tx checksum offloading
net: stmmac: Tx coe sw fallback
[ Upstream commit 8452a05b2c633b708dbe3e742f71b24bf21fe42d ]
Add sw fallback of tx checksum calculation for those tx queues that don't support tx checksum offloading. DW xGMAC IP can be synthesized such that it can support tx checksum offloading only for a few initial tx queues. Also as Serge pointed out, for the DW QoS IP, tx coe can be individually configured for each tx queue.
So when tx coe is enabled, for any tx queue that doesn't support tx coe with 'coe-unsupported' flag set will have a sw fallback happen in the driver for tx checksum calculation when any packets to be transmitted on these tx queues.
Signed-off-by: Rohan G Thomas <rohan.g.thomas@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> Stable-dep-of: c2945c435c99 ("net: stmmac: Prevent DSA tags from breaking COE") Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
e1fbdef9 |
| 30-Nov-2023 |
Jianheng Zhang <Jianheng.Zhang@synopsys.com> |
net: stmmac: fix FPE events losing
[ Upstream commit 37e4b8df27bc68340f3fc80dbb27e3549c7f881c ]
The status bits of register MAC_FPE_CTRL_STS are clear on read. Using 32-bit read for MAC_FPE_CTRL_ST
net: stmmac: fix FPE events losing
[ Upstream commit 37e4b8df27bc68340f3fc80dbb27e3549c7f881c ]
The status bits of register MAC_FPE_CTRL_STS are clear on read. Using 32-bit read for MAC_FPE_CTRL_STS in dwmac5_fpe_configure() and dwmac5_fpe_send_mpacket() clear the status bits. Then the stmmac interrupt handler missing FPE event status and leads to FPE handshaking failure and retries. To avoid clear status bits of MAC_FPE_CTRL_STS in dwmac5_fpe_configure() and dwmac5_fpe_send_mpacket(), add fpe_csr to stmmac_fpe_cfg structure to cache the control bits of MAC_FPE_CTRL_STS and to avoid reading MAC_FPE_CTRL_STS in those methods.
Fixes: 5a5586112b92 ("net: stmmac: support FPE link partner hand-shaking procedure") Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Jianheng Zhang <Jianheng.Zhang@synopsys.com> Link: https://lore.kernel.org/r/CY5PR12MB637225A7CF529D5BE0FBE59CBF81A@CY5PR12MB6372.namprd12.prod.outlook.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48 |
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#
a014c355 |
| 26-Aug-2023 |
Russell King (Oracle) <rmk+kernel@armlinux.org.uk> |
net: stmmac: clarify difference between "interface" and "phy_interface"
Clarify the difference between "interface" and "phy_interface" in struct plat_stmmacenet_data, both by adding a comment, and a
net: stmmac: clarify difference between "interface" and "phy_interface"
Clarify the difference between "interface" and "phy_interface" in struct plat_stmmacenet_data, both by adding a comment, and also renaming "interface" to be "mac_interface". The difference between these are:
MAC ----- optional PCS ----- SerDes ----- optional PHY ----- Media ^ ^ mac_interface phy_interface
Note that phylink currently only deals with phy_interface.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/E1qZq83-005tts-6K@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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e80af2ac |
| 24-Aug-2023 |
Russell King (Oracle) <rmk+kernel@armlinux.org.uk> |
net: stmmac: convert plat->phylink_node to fwnode
All users of plat->phylink_node first convert it to a fwnode. Rather than repeatedly convert to a fwnode, store it as a fwnode. To reflect this chan
net: stmmac: convert plat->phylink_node to fwnode
All users of plat->phylink_node first convert it to a fwnode. Rather than repeatedly convert to a fwnode, store it as a fwnode. To reflect this change, call it plat->port_node instead - it is used for more than just phylink.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/E1qZAX8-005pTo-OT@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.46, v6.1.45, v6.1.44 |
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1fc04a0b |
| 07-Aug-2023 |
Shenwei Wang <shenwei.wang@nxp.com> |
net: stmmac: add new mode parameter for fix_mac_speed
A mode parameter has been added to the callback function of fix_mac_speed to indicate the physical layer type.
The mode can be one the followin
net: stmmac: add new mode parameter for fix_mac_speed
A mode parameter has been added to the callback function of fix_mac_speed to indicate the physical layer type.
The mode can be one the following: MLO_AN_PHY - Conventional PHY MLO_AN_FIXED - Fixed-link mode MLO_AN_INBAND - In-band protocol
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Link: https://lore.kernel.org/r/20230807160716.259072-2-shenwei.wang@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.43 |
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26cfb838 |
| 01-Aug-2023 |
Johannes Zink <j.zink@pengutronix.de> |
net: stmmac: correct MAC propagation delay
The IEEE1588 Standard specifies that the timestamps of Packets must be captured when the PTP message timestamp point (leading edge of first octet after the
net: stmmac: correct MAC propagation delay
The IEEE1588 Standard specifies that the timestamps of Packets must be captured when the PTP message timestamp point (leading edge of first octet after the start of frame delimiter) crosses the boundary between the node and the network. As the MAC latches the timestamp at an internal point, the captured timestamp must be corrected for the additional data transmission latency, as described in the publicly available datasheet [1].
This patch only corrects for the MAC-Internal delay, which can be read out from the MAC_Ingress_Timestamp_Latency register on DWMAC version 5, since the Phy framework currently does not support querying the Phy ingress and egress latency. The Closs Domain Crossing Circuits errors as indicated in [1] are already being accounted in the stmmac_get_tx_hwtstamp() function and are not corrected here.
As the Latency varies for different link speeds and MII modes of operation, the correction value needs to be updated on each link state change.
As the delay also causes a phase shift in the timestamp counter compared to the rest of the network, this correction will also reduce phase error when generating PPS outputs from the timestamp counter.
Since the correction registers may be unavailable on some hardware and no feature bits are documented for dynamically detection of the MAC propagation delay readout, introduce a feature bit to explicitely enable MAC delay Correction in the gluecode driver.
[1] i.MX8MP Reference Manual, rev.1 Section 11.7.2.5.3 "Timestamp correction"
Signed-off-by: Johannes Zink <j.zink@pengutronix.de> Link: https://lore.kernel.org/r/20230719-stmmac_correct_mac_delay-v2-1-3366f38ee9a6@pengutronix.de Link: https://lore.kernel.org/r/20230719-stmmac_correct_mac_delay-v3-1-61e63427735e@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.42 |
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d928d14b |
| 25-Jul-2023 |
Andrew Halaney <ahalaney@redhat.com> |
net: stmmac: Make ptp_clk_freq_config variable type explicit
The priv variable is _always_ of type (struct stmmac_priv *), so let's stop using (void *) since it isn't abstracting anything.
Reviewed
net: stmmac: Make ptp_clk_freq_config variable type explicit
The priv variable is _always_ of type (struct stmmac_priv *), so let's stop using (void *) since it isn't abstracting anything.
Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230725211853.895832-3-ahalaney@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.41, v6.1.40, v6.1.39 |
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9d0c0d5e |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the en_tx_lpi_clockgating field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski
net: stmmac: replace the en_tx_lpi_clockgating field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-13-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
743dd1db |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the rx_clk_runs_in_lpi field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <ba
net: stmmac: replace the rx_clk_runs_in_lpi field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-12-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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621ba7ad |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the int_snapshot_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <barto
net: stmmac: replace the int_snapshot_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-11-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
aa5513f5 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the ext_snapshot_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <barto
net: stmmac: replace the ext_snapshot_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-10-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
956c3f09 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the multi_msi_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.
net: stmmac: replace the multi_msi_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-9-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
fc02152b |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the vlan_fail_q_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartos
net: stmmac: replace the vlan_fail_q_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-8-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
efe92571 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the serdes_up_after_phy_linkup field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golasze
net: stmmac: replace the serdes_up_after_phy_linkup field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-7-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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68861a3b |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the tso_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golasz
net: stmmac: replace the tso_en field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-6-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
d8daff28 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the has_sun8i field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.gol
net: stmmac: replace the has_sun8i field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-5-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
fd1d62d8 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the use_phy_wol field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.g
net: stmmac: replace the use_phy_wol field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-4-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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309efe6e |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the sph_disable field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.g
net: stmmac: replace the sph_disable field with a flag
Drop the boolean field of the plat_stmmacenet_data structure in favor of a simple bitfield flag.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-3-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
d26979f1 |
| 10-Jul-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: replace the has_integrated_pcs field with a flag
struct plat_stmmacenet_data contains several boolean fields that could be easily replaced with a common integer 'flags' bitfield and bit
net: stmmac: replace the has_integrated_pcs field with a flag
struct plat_stmmacenet_data contains several boolean fields that could be easily replaced with a common integer 'flags' bitfield and bit defines.
Start the process with the has_integrated_pcs field.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230710090001.303225-2-brgl@bgdev.pl Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35 |
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#
aa571b62 |
| 19-Jun-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
net: stmmac: add new switch to struct plat_stmmacenet_data
On some platforms, the PCS can be integrated in the MAC so the driver will not see any PCS link activity. Add a switch that allows the plat
net: stmmac: add new switch to struct plat_stmmacenet_data
On some platforms, the PCS can be integrated in the MAC so the driver will not see any PCS link activity. Add a switch that allows the platform drivers to let the core code know.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24 |
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#
33719b57 |
| 11-Apr-2023 |
Andrew Halaney <ahalaney@redhat.com> |
net: stmmac: dwmac4: Allow platforms to specify some DMA/MTL offsets
Some platforms have dwmac4 implementations that have a different address space layout than the default, resulting in the need to
net: stmmac: dwmac4: Allow platforms to specify some DMA/MTL offsets
Some platforms have dwmac4 implementations that have a different address space layout than the default, resulting in the need to define their own DMA/MTL offsets.
Extend the functions to allow a platform driver to indicate what its addresses are, overriding the defaults.
Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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Revision tags: v6.1.23 |
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#
10739ea3 |
| 03-Apr-2023 |
Shenwei Wang <shenwei.wang@nxp.com> |
net: stmmac: add support for platform specific reset
This patch adds support for platform-specific reset logic in the stmmac driver. Some SoCs require a different reset mechanism than the standard d
net: stmmac: add support for platform specific reset
This patch adds support for platform-specific reset logic in the stmmac driver. Some SoCs require a different reset mechanism than the standard dwmac IP reset. To support these platforms, a new function pointer 'fix_soc_reset' is added to the plat_stmmacenet_data structure. The stmmac_reset in hwif.h is modified to call the 'fix_soc_reset' function if it exists. This enables the driver to use the platform-specific reset logic when necessary.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Link: https://lore.kernel.org/r/20230403222302.328262-1-shenwei.wang@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.22, v6.1.21 |
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#
070246e4 |
| 17-Mar-2023 |
Jochen Henneberg <jh@henneberg-systemdesign.com> |
net: stmmac: Fix for mismatched host/device DMA address width
Currently DMA address width is either read from a RO device register or force set from the platform data. This breaks DMA when the host
net: stmmac: Fix for mismatched host/device DMA address width
Currently DMA address width is either read from a RO device register or force set from the platform data. This breaks DMA when the host DMA address width is <=32it but the device is >32bit.
Right now the driver may decide to use a 2nd DMA descriptor for another buffer (happens in case of TSO xmit) assuming that 32bit addressing is used due to platform configuration but the device will still use both descriptor addresses as one address.
This can be observed with the Intel EHL platform driver that sets 32bit for addr64 but the MAC reports 40bit. The TX queue gets stuck in case of TCP with iptables NAT configuration on TSO packets.
The logic should be like this: Whatever we do on the host side (memory allocation GFP flags) should happen with the host DMA width, whenever we decide how to set addresses on the device registers we must use the device DMA address width.
This patch renames the platform address width field from addr64 (term used in device datasheet) to host_addr and uses this value exclusively for host side operations while all chip operations consider the device DMA width as read from the device register.
Fixes: 7cfc4486e7ea ("stmmac: intel: Configure EHL PSE0 GbE and PSE1 GbE to 32 bits DMA addressing") Signed-off-by: Jochen Henneberg <jh@henneberg-systemdesign.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9 |
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#
54aa39a5 |
| 26-Jan-2023 |
Andrey Konovalov <andrey.konovalov@linaro.org> |
net: stmmac: do not stop RX_CLK in Rx LPI state for qcs404 SoC
Currently in phy_init_eee() the driver unconditionally configures the PHY to stop RX_CLK after entering Rx LPI state. This causes an LP
net: stmmac: do not stop RX_CLK in Rx LPI state for qcs404 SoC
Currently in phy_init_eee() the driver unconditionally configures the PHY to stop RX_CLK after entering Rx LPI state. This causes an LPI interrupt storm on my qcs404-base board.
Change the PHY initialization so that for "qcom,qcs404-ethqos" compatible device RX_CLK continues to run even in Rx LPI state.
Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11 |
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a46e9010 |
| 01-Dec-2022 |
Revanth Kumar Uppala <ruppala@nvidia.com> |
net: stmmac: Power up SERDES after the PHY link
The Tegra MGBE ethernet controller requires that the SERDES link is powered-up after the PHY link is up, otherwise the link fails to become ready foll
net: stmmac: Power up SERDES after the PHY link
The Tegra MGBE ethernet controller requires that the SERDES link is powered-up after the PHY link is up, otherwise the link fails to become ready following a resume from suspend. Add a variable to indicate that the SERDES link must be powered-up after the PHY link.
Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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