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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dhi6220-clock.txt1 * Hisilicon Hi6220 Clock Controller
3 Clock control registers reside in different Hi6220 system controllers,
14 - "hisilicon,hi6220-acpu-sctrl"
15 - "hisilicon,hi6220-aoctrl"
16 - "hisilicon,hi6220-sysctrl"
17 - "hisilicon,hi6220-mediactrl"
18 - "hisilicon,hi6220-pmctrl"
19 - "hisilicon,hi6220-stub-clk"
28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
36 compatible = "hisilicon,hi6220-sysctrl", "syscon";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml#
7 title: Hisilicon Hi6220 domain controller
19 Power Always ON domain controller --> hisilicon,hi6220-aoctrl
20 Media domain controller --> hisilicon,hi6220-mediactrl
21 Power Management domain controller --> hisilicon,hi6220-pmctrl
27 - hisilicon,hi6220-aoctrl
28 - hisilicon,hi6220-mediactrl
29 - hisilicon,hi6220-pmctrl
51 compatible = "hisilicon,hi6220-aoctrl", "syscon";
58 compatible = "hisilicon,hi6220-mediactrl", "syscon";
[all …]
H A Dsysctrl.yaml17 Hi3519, Hi6220 system controller, each of them is mostly compatible with the
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
33 const: hisilicon,hi6220-sysctrl
44 - hisilicon,hi6220-sysctrl
120 /* Hi6220 system controller */
122 compatible = "hisilicon,hi6220-sysctrl", "syscon";
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dhisilicon,hi6220-mailbox.txt1 Hisilicon Hi6220 Mailbox Driver
4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
14 - compatible: Shall be "hisilicon,hi6220-mbox"
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
43 compatible = "hisilicon,hi6220-mbox";
69 compatible = "hisilicon,hi6220-stub-clk";
70 hisilicon,hi6220-clk-sram = <&sram>;
/openbmc/u-boot/arch/arm/dts/
H A Dhi6220.dtsi2 * dts file for Hisilicon Hi6220 SoC
8 #include <dt-bindings/clock/hi6220-clock.h>
11 compatible = "hisilicon,hi6220";
141 compatible = "hisilicon,hi6220-aoctrl", "syscon";
147 compatible = "hisilicon,hi6220-sysctrl", "syscon";
154 compatible = "hisilicon,hi6220-mediactrl", "syscon";
160 compatible = "hisilicon,hi6220-pmctrl", "syscon";
166 compatible = "hisilicon,hi6220-dw-mshc";
175 compatible = "hisilicon,hi6220-dw-mshc";
H A Dhi6220-hikey.dts13 #include "hi6220.dtsi"
17 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
/openbmc/linux/drivers/clk/hisilicon/
H A DKconfig49 bool "Hi6220 Clock Driver"
53 Build the Hisilicon Hi6220 clock driver based on the common clock framework.
63 bool "Hi6220 Stub Clock Driver" if EXPERT
68 Build the Hisilicon Hi6220 stub clock driver.
H A DMakefile6 obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
17 obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
19 obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o
H A Dclk-hi6220-stub.c3 * Hi6220 stub clock driver
207 "hisilicon,hi6220-clk-sram"); in hi6220_stub_clk_probe()
256 { .compatible = "hisilicon,hi6220-stub-clk", },
262 .name = "hi6220-stub-clk",
H A Dclk-hi6220.c3 * Hisilicon Hi6220 clock driver
16 #include <dt-bindings/clock/hi6220-clock.h>
87 CLK_OF_DECLARE_DRIVER(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init);
194 CLK_OF_DECLARE_DRIVER(hi6220_clk_sys, "hisilicon,hi6220-sysctrl", hi6220_clk_sys_init);
251 CLK_OF_DECLARE_DRIVER(hi6220_clk_media, "hisilicon,hi6220-mediactrl", hi6220_clk_media_init);
282 CLK_OF_DECLARE(hi6220_clk_power, "hisilicon,hi6220-pmctrl", hi6220_clk_power_init);
304 CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dhisilicon,hi655x.txt3 The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
4 Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
9 | Hi6220 | SSI bus | Hi655x |
16 - reg: Base address of PMIC on Hi6220 SoC.
/openbmc/linux/include/dt-bindings/clock/
H A Dhi6220-clock.h11 /* clk in Hi6220 AO (always on) controller */
59 /* clk in Hi6220 systrl */
129 /* clk in Hi6220 media controller */
161 /* clk in Hi6220 power controller */
175 /* clk in Hi6220 acpu sctrl */
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-hi6220-usb.txt1 Hisilicon hi6220 usb PHY
5 - compatible: should be "hisilicon,hi6220-usb-phy"
12 compatible = "hisilicon,hi6220-usb-phy";
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dk3-dw-mshc.txt19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
52 /* for Hi6220 */
55 compatible = "hisilicon,hi6220-dw-mshc";
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220.dtsi3 * dts file for Hisilicon Hi6220 SoC
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
15 compatible = "hisilicon,hi6220";
259 compatible = "hisilicon,hi6220-sramctrl", "syscon";
264 compatible = "hisilicon,hi6220-aoctrl", "syscon";
271 compatible = "hisilicon,hi6220-sysctrl", "syscon";
278 compatible = "hisilicon,hi6220-mediactrl", "syscon";
285 compatible = "hisilicon,hi6220-pmctrl", "syscon";
291 compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
[all …]
/openbmc/linux/drivers/reset/hisilicon/
H A Dhi6220_reset.c3 * Hisilicon Hi6220 reset controller driver
192 .compatible = "hisilicon,hi6220-sysctrl",
196 .compatible = "hisilicon,hi6220-mediactrl",
200 .compatible = "hisilicon,hi6220-aoctrl",
210 .name = "reset-hi6220",
H A DKconfig10 tristate "Hi6220 Reset Driver"
14 Build the Hisilicon Hi6220 reset driver.
/openbmc/u-boot/include/dt-bindings/clock/
H A Dhi6220-clock.h14 /* clk in Hi6220 AO (always on) controller */
61 /* clk in Hi6220 systrl */
128 /* clk in Hi6220 media controller */
160 /* clk in Hi6220 power controller */
/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/
H A Dhisilicon.yaml37 - description: Hi6220 based boards.
39 - const: hisilicon,hi6220-hikey
40 - const: hisilicon,hi6220
/openbmc/linux/Documentation/devicetree/bindings/display/hisilicon/
H A Ddw-dsi.txt7 - compatible: value should be "hisilicon,hi6220-dsi".
17 A example of HiKey board hi6220 SoC and board specific DT entry:
22 compatible = "hisilicon,hi6220-dsi";
H A Dhisi-ade.txt8 - compatible: value should be "hisilicon,hi6220-ade".
35 A example of HiKey board hi6220 SoC specific DT entry:
39 compatible = "hisilicon,hi6220-ade";
/openbmc/linux/drivers/phy/hisilicon/
H A Dphy-hi6220-usb.c149 {.compatible = "hisilicon,hi6220-usb-phy",},
157 .name = "hi6220-usb-phy",
163 MODULE_DESCRIPTION("HISILICON HI6220 USB PHY driver");
164 MODULE_ALIAS("platform:hi6220-usb-phy");
H A DKconfig6 tristate "hi6220 USB PHY support"
12 Enable this to support the HISILICON HI6220 USB PHY.
/openbmc/linux/drivers/mailbox/
H A Dhi6220-mailbox.c3 * Hisilicon's Hi6220 mailbox driver
258 { .compatible = "hisilicon,hi6220-mbox", },
329 mbox->tx_irq_mode = !of_property_read_bool(node, "hi6220,mbox-tx-noirq"); in hi6220_mbox_probe()
351 .name = "hi6220-mbox",
370 MODULE_DESCRIPTION("Hi6220 mailbox driver");
H A DKconfig159 tristate "Hi6220 Mailbox" if EXPERT
164 An implementation of the hi6220 mailbox. It is used to send message
166 build Hi6220 mailbox controller driver.

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