1cbdd535dSChen FengHisilicon Hi655x Power Management Integrated Circuit (PMIC) 2cbdd535dSChen Feng 3cbdd535dSChen FengThe hardware layout for access PMIC Hi655x from AP SoC Hi6220. 4cbdd535dSChen FengBetween PMIC Hi655x and Hi6220, the physical signal channel is SSI. 5cbdd535dSChen FengWe can use memory-mapped I/O to communicate. 6cbdd535dSChen Feng 7cbdd535dSChen Feng+----------------+ +-------------+ 8cbdd535dSChen Feng| | | | 9cbdd535dSChen Feng| Hi6220 | SSI bus | Hi655x | 10cbdd535dSChen Feng| |-------------| | 11cbdd535dSChen Feng| |(REGMAP_MMIO)| | 12cbdd535dSChen Feng+----------------+ +-------------+ 13cbdd535dSChen Feng 14cbdd535dSChen FengRequired properties: 15cbdd535dSChen Feng- compatible: Should be "hisilicon,hi655x-pmic". 16cbdd535dSChen Feng- reg: Base address of PMIC on Hi6220 SoC. 17cbdd535dSChen Feng- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). 18cbdd535dSChen Feng- pmic-gpios: The GPIO used by PMIC IRQ. 19f74ac688SDaniel Lezcano- #clock-cells: From common clock binding; shall be set to 0 20f74ac688SDaniel Lezcano 21f74ac688SDaniel LezcanoOptional properties: 22f74ac688SDaniel Lezcano- clock-output-names: From common clock binding to override the 23f74ac688SDaniel Lezcano default output clock name 24cbdd535dSChen Feng 25cbdd535dSChen FengExample: 26cbdd535dSChen Feng pmic: pmic@f8000000 { 27cbdd535dSChen Feng compatible = "hisilicon,hi655x-pmic"; 28cbdd535dSChen Feng reg = <0x0 0xf8000000 0x0 0x1000>; 29cbdd535dSChen Feng interrupt-controller; 30cbdd535dSChen Feng #interrupt-cells = <2>; 31cbdd535dSChen Feng pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 32f74ac688SDaniel Lezcano #clock-cells = <0>; 33cbdd535dSChen Feng } 34