Home
last modified time | relevance | path

Searched defs:phase (Results 1 – 25 of 31) sorted by relevance

12

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c91 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
181 u32 reg, cs, ecc, pup_num, phase, delay, pup; in ddr3_read_leveling_sw() local
338 u32 phase) in overrun()
403 u32 reg, delay, phase, pup, rd_sample_delay, add, locked_pups, in ddr3_read_leveling_single_cs_rl_mode() local
755 u32 reg, delay, phase, sum, pup, rd_sample_delay, add, locked_pups, in ddr3_read_leveling_single_cs_window_mode() local
H A Dddr3_write_leveling.c66 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
186 u32 cs, cnt, pup_num, sum, phase, delay, max_pup_num, pup, sdram_offset; in ddr3_wl_supplement() local
474 u32 reg, phase, delay, cs, pup, pup_num; in ddr3_write_leveling_hw_reg_dimm() local
1127 u32 reg, pup_num, delay, phase, phaseMax, max_pup_num, pup, in ddr3_write_leveling_single_cs() local
H A Dddr3_hw_training.c547 void ddr3_write_pup_reg(u32 mode, u32 cs, u32 pup, u32 phase, u32 delay) in ddr3_write_pup_reg()
1048 u32 pup, reg, phase; in ddr3_get_min_max_rl_phase() local
/openbmc/qemu/tests/tcg/multiarch/
H A Dlate-attach.c11 static const char *phase = "start"; variable
/openbmc/qemu/include/block/
H A Dblock-global-state.h222 } phase; member
/openbmc/qemu/tests/qtest/migration/
H A Dprecopy-tests.c670 const char *uri, const char *phase) in test_cancel_src_after_failed()
697 const char *uri, const char *phase) in test_cancel_src_after_cancelled()
721 const char *uri, const char *phase) in test_cancel_src_after_complete()
742 const char *uri, const char *phase) in test_cancel_src_after_none()
763 const char *uri, const char *phase) in test_cancel_src_pre_switchover()
792 g_autofree char *phase = g_path_get_basename(test_path); in test_cancel_src_after_status() local
/openbmc/u-boot/include/
H A Defi_selftest.h136 const enum efi_test_phase phase; member
H A Dsym53c8xx.h525 #define WHEN(phase) (0x00030000 | (phase)) argument
526 #define IF(phase) (0x00020000 | (phase)) argument
/openbmc/u-boot/arch/x86/include/asm/fsp/
H A Dfsp_api.h58 enum fsp_phase phase; member
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c133 static void mctl_enable_dll0(u32 phase) in mctl_enable_dll0()
163 static void mctl_enable_dllx(u32 phase) in mctl_enable_dllx()
/openbmc/u-boot/lib/efi_selftest/
H A Defi_selftest.c187 void efi_st_do_tests(const u16 *testname, unsigned int phase, in efi_st_do_tests()
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c285 static void scc_mgr_set_dqdqs_output_phase(u32 write_group, u32 phase) in scc_mgr_set_dqdqs_output_phase()
295 static void scc_mgr_set_dqs_en_phase(u32 read_group, u32 phase) in scc_mgr_set_dqs_en_phase()
391 static void scc_mgr_set_dqs_en_phase_all_ranks(u32 read_group, u32 phase) in scc_mgr_set_dqs_en_phase_all_ranks()
406 u32 phase) in scc_mgr_set_dqdqs_output_phase_all_ranks()
2532 const u32 phase) in rw_mgr_mem_calibrate_guaranteed_write()
/openbmc/u-boot/arch/x86/lib/fsp/
H A Dfsp_support.c184 u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) in fsp_notify()
/openbmc/qemu/hw/core/
H A Dqdev.c851 bool phase_check(MachineInitPhase phase) in phase_check()
856 void phase_advance(MachineInitPhase phase) in phase_advance()
/openbmc/u-boot/drivers/usb/emul/
H A Dsandbox_flash.c58 enum cmd_phase phase; member
/openbmc/qemu/hw/block/
H A Dfdc-internal.h97 uint8_t phase; member
/openbmc/qemu/hw/audio/
H A Dasc.c294 uint32_t phase, incr, offset; in generate_wavetable() local
/openbmc/fb-ipmi-oem/src/
H A Dusb-dbg.cpp375 int plat_udbg_get_post_desc(uint8_t index, uint8_t* next, uint8_t phase, in plat_udbg_get_post_desc()
/openbmc/u-boot/drivers/nvme/
H A Dnvme.c163 u16 phase = nvmeq->cq_phase; in nvme_submit_sync_cmd() local
/openbmc/qemu/include/standard-headers/linux/
H A Dinput.h407 uint16_t phase; member
/openbmc/qemu/hw/scsi/
H A Desp.c87 static void esp_set_phase(ESPState *s, uint8_t phase) in esp_set_phase()
H A Dlsi53c895a.c327 static const char *scsi_phase_name(int phase) in scsi_phase_name()
569 static inline void lsi_set_phase(LSIState *s, int phase) in lsi_set_phase()
/openbmc/qemu/hw/m68k/
H A Dnext-cube.c54 int8_t phase; member
/openbmc/qemu/hw/virtio/
H A Dvhost-user.c208 uint32_t phase; member
2887 VhostDeviceStatePhase phase, in vhost_user_set_device_state_fd()
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_regs.h263 #define TRN_DBG_RDY_INC_PH_2TO1_OFFS(phase) (TRN_DBG_RDY_INC_PH_2TO1_BASE + (phase) * 3) argument

12