1*83d290c5STom Rini /* SPDX-License-Identifier: Intel */ 21021af4dSSimon Glass /* 31021af4dSSimon Glass * Copyright (C) 2013, Intel Corporation 41021af4dSSimon Glass * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 51021af4dSSimon Glass */ 61021af4dSSimon Glass 71021af4dSSimon Glass #ifndef __FSP_API_H__ 81021af4dSSimon Glass #define __FSP_API_H__ 91021af4dSSimon Glass 1082196cf3SSimon Glass #include <linux/linkage.h> 1182196cf3SSimon Glass 121021af4dSSimon Glass /* 13cb379a34SBin Meng * FSP common configuration structure. 14cb379a34SBin Meng * This needs to be included in the platform-specific struct fsp_config_data. 15cb379a34SBin Meng */ 16cb379a34SBin Meng struct fsp_cfg_common { 17cb379a34SBin Meng struct fsp_header *fsp_hdr; 18cb379a34SBin Meng u32 stack_top; 19cb379a34SBin Meng u32 boot_mode; 20cb379a34SBin Meng }; 21cb379a34SBin Meng 22cb379a34SBin Meng /* 231021af4dSSimon Glass * FspInit continuation function prototype. 241021af4dSSimon Glass * Control will be returned to this callback function after FspInit API call. 251021af4dSSimon Glass */ 261021af4dSSimon Glass typedef void (*fsp_continuation_f)(u32 status, void *hob_list); 271021af4dSSimon Glass 281021af4dSSimon Glass struct fsp_init_params { 291021af4dSSimon Glass /* Non-volatile storage buffer pointer */ 301021af4dSSimon Glass void *nvs_buf; 311021af4dSSimon Glass /* Runtime buffer pointer */ 321021af4dSSimon Glass void *rt_buf; 331021af4dSSimon Glass /* Continuation function address */ 341021af4dSSimon Glass fsp_continuation_f continuation; 351021af4dSSimon Glass }; 361021af4dSSimon Glass 371021af4dSSimon Glass struct common_buf { 381021af4dSSimon Glass /* 391021af4dSSimon Glass * Stack top pointer used by the bootloader. The new stack frame will be 401021af4dSSimon Glass * set up at this location after FspInit API call. 411021af4dSSimon Glass */ 42f0285fbeSBin Meng u32 stack_top; 431021af4dSSimon Glass u32 boot_mode; /* Current system boot mode */ 441021af4dSSimon Glass void *upd_data; /* User platform configuraiton data region */ 45bb737cedSBin Meng u32 tolum_size; /* Top of low usable memory size (FSP 1.1) */ 46bb737cedSBin Meng u32 reserved[6]; /* Reserved */ 471021af4dSSimon Glass }; 481021af4dSSimon Glass 491021af4dSSimon Glass enum fsp_phase { 501021af4dSSimon Glass /* Notification code for post PCI enuermation */ 511021af4dSSimon Glass INIT_PHASE_PCI = 0x20, 521021af4dSSimon Glass /* Notification code before transfering control to the payload */ 531021af4dSSimon Glass INIT_PHASE_BOOT = 0x40 541021af4dSSimon Glass }; 551021af4dSSimon Glass 561021af4dSSimon Glass struct fsp_notify_params { 571021af4dSSimon Glass /* Notification phase used for NotifyPhase API */ 581021af4dSSimon Glass enum fsp_phase phase; 591021af4dSSimon Glass }; 601021af4dSSimon Glass 611021af4dSSimon Glass /* FspInit API function prototype */ 6282196cf3SSimon Glass typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params); 631021af4dSSimon Glass 641021af4dSSimon Glass /* FspNotify API function prototype */ 6582196cf3SSimon Glass typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params); 661021af4dSSimon Glass 671021af4dSSimon Glass #endif 68