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Searched defs:_shift (Results 176 – 200 of 223) sorted by relevance

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/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-infracfg.c16 #define GATE_ICG(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8188-topckgen.c1200 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument
1203 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8188-apmixedsys.c21 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8167-apmixedsys.c77 #define DIV_ADJ_FLAG(_id, _name, _parent, _reg, _shift, _width, _flag) { \ argument
H A Dclk-mt7622-apmixedsys.c54 #define GATE_APMIXED_AO(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8195-apmixedsys.c22 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
H A Dclk-mt8192-apmixedsys.c24 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
/openbmc/linux/drivers/clk/
H A Dclk-loongson1.c153 #define LS1X_CLK_PLL(_name, _offset, _fixed, _shift, \ argument
177 #define LS1X_CLK_DIV(_name, _pname, _offset, _shift, _width, \ argument
H A Dclk-stm32mp1.c1193 #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ argument
1210 #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\ argument
1214 #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ argument
1340 #define _STM32_MUX(_offset, _shift, _width, _mux_flags, _mmux, _ops)\ argument
1353 #define _MUX(_offset, _shift, _width, _mux_flags)\ argument
1694 #define _K_MUX(_id, _offset, _shift, _width, _mux_flags, _mmux, _ops)\ argument
1707 #define K_MUX(_id, _offset, _shift, _width, _mux_flags)\ argument
1711 #define K_MMUX(_id, _offset, _shift, _width, _mux_flags)\ argument
/openbmc/linux/drivers/clk/microchip/
H A Dclk-mpfs.c172 #define CLK_PLL(_id, _name, _parent, _shift, _width, _flags, _offset) { \ argument
211 #define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags, _offset) { \ argument
272 #define CLK_PERIPH(_id, _name, _parent, _shift, _flags) { \ argument
H A Dclk-mpfs-ccc.c101 #define CLK_CCC_PLL(_id, _parents, _shift, _width, _flags, _offset) { \ argument
124 #define CLK_CCC_OUT(_id, _shift, _width, _flags, _offset) { \ argument
/openbmc/linux/drivers/clk/pistachio/
H A Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_acl.c532 #define MLXSW_SP_ACL_MANGLE_ACTION(_htype, _offset, _mask, _shift, _field) \ argument
541 #define MLXSW_SP_ACL_MANGLE_ACTION_IP4(_offset, _mask, _shift, _field) \ argument
545 #define MLXSW_SP_ACL_MANGLE_ACTION_IP6(_offset, _mask, _shift, _field) \ argument
549 #define MLXSW_SP_ACL_MANGLE_ACTION_TCP(_offset, _mask, _shift, _field) \ argument
552 #define MLXSW_SP_ACL_MANGLE_ACTION_UDP(_offset, _mask, _shift, _field) \ argument
H A Dspectrum_acl_flex_keys.c263 #define MLXSW_SP2_AFK_BLOCK_LAYOUT(_block, _offset, _shift) \ argument
/openbmc/linux/drivers/clk/qcom/
H A Dlcc-msm8960.c183 #define CLK_AIF_OSR_BIT_CLK(prefix, _ns, _shift) \ argument
/openbmc/linux/drivers/clk/bcm/
H A Dclk-kona.h291 #define DIVIDER(_offset, _shift, _width) \ argument
301 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
342 #define SELECTOR(_offset, _shift, _width) \ argument
/openbmc/linux/drivers/clk/meson/
H A Daxg-audio.c40 #define AUD_MUX(_name, _reg, _mask, _shift, _dflags, _pdata, _iflags) { \ argument
56 #define AUD_DIV(_name, _reg, _shift, _width, _dflags, _pname, _iflags) { \ argument
136 #define AUD_PHASE(_name, _reg, _width, _shift, _pname, _iflags) { \ argument
322 #define AUD_TDM_PAD_CTRL(_name, _reg, _shift, _parents) \ argument
/openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-core.h298 #define DIVIDER(_offset, _shift, _width) \ argument
308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
349 #define SELECTOR(_offset, _shift, _width) \ argument
/openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-core.h298 #define DIVIDER(_offset, _shift, _width) \ argument
308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
349 #define SELECTOR(_offset, _shift, _width) \ argument
/openbmc/linux/drivers/memory/
H A Ddfl-emif.c106 #define emif_state_attr(_name, _shift, _index) \ argument
/openbmc/linux/drivers/clk/stm32/
H A Dclk-stm32mp13.c288 #define CFG_DIV(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
350 #define _CFG_MUX(_id, _offset, _shift, _witdh, _ready, _flags)\ argument
359 #define CFG_MUX(_id, _offset, _shift, _witdh)\ argument
362 #define CFG_MUX_SAFE(_id, _offset, _shift, _witdh)\ argument
/openbmc/linux/drivers/regulator/
H A Drtq2208-regulator.c327 #define BUCK_RG_SHIFT(_base, _shift) (_base + _shift) argument
329 #define LDO_RG_SHIFT(_base, _shift) (_base + _shift) argument
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dxusb-padctl.c82 #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
/openbmc/linux/drivers/iio/adc/
H A Dad7476.c167 #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \ argument
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c62 #define TEGRA210_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument

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