| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-apmixedsys.c | 26 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| H A D | clk-mt8195-apmixedsys.c | 33 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| H A D | clk-mt6765.c | 671 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
695 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| H A D | clk-mt8516.c | 469 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
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| H A D | clk-mt8167.c | 658 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
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| /openbmc/linux/drivers/net/wireless/ath/ath5k/ |
| H A D | ath5k.h | 124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ argument
128 #define AR5K_REG_MASKED_BITS(ah, _reg, _flags, _mask) \ argument
132 #define AR5K_REG_ENABLE_BITS(ah, _reg, _flags) \ argument
135 #define AR5K_REG_DISABLE_BITS(ah, _reg, _flags) \ argument
139 #define AR5K_REG_READ_Q(ah, _reg, _queue) \ argument
142 #define AR5K_REG_WRITE_Q(ah, _reg, _queue) \ argument
145 #define AR5K_Q_ENABLE_BITS(_reg, _queue) do { \ argument
149 #define AR5K_Q_DISABLE_BITS(_reg, _queue) do { \ argument
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| /openbmc/linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7724.c | 150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| H A D | clock-sh7734.c | 69 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| /openbmc/linux/drivers/regulator/ |
| H A D | max77650-regulator.c | 16 #define MAX77650_REGULATOR_EN_CTRL_BITS(_reg) \ argument
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| H A D | pcap-regulator.c | 99 #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \ argument
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | axp20x_adc.c | 44 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ argument
55 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ argument
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| /openbmc/linux/drivers/clk/nxp/ |
| H A D | clk-lpc32xx.c | 1093 #define LPC32XX_DEFINE_PLL(_idx, _name, _reg, _enable) \ argument
1109 #define LPC32XX_DEFINE_MUX(_idx, _reg, _shift, _mask, _table, _flags) \ argument
1130 #define LPC32XX_DEFINE_DIV(_idx, _reg, _shift, _width, _table, _flags) \ argument
1149 #define LPC32XX_DEFINE_GATE(_idx, _reg, _bit, _flags) \ argument
1166 #define LPC32XX_DEFINE_CLK(_idx, _reg, _e, _em, _d, _dm, _b, _bm, _ops) \ argument
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| /openbmc/linux/drivers/power/supply/ |
| H A D | acer_a500_battery.c | 29 #define EC_DATA(_reg, _psp) { \ argument
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| /openbmc/linux/drivers/net/wireless/ath/ |
| H A D | key.c | 26 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
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| /openbmc/linux/drivers/dma/ |
| H A D | pxa_dma.c | 145 #define _phy_readl_relaxed(phy, _reg) \ argument
147 #define phy_readl_relaxed(phy, _reg) \ argument
156 #define phy_writel(phy, val, _reg) \ argument
163 #define phy_writel_relaxed(phy, val, _reg) \ argument
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| /openbmc/linux/drivers/clk/baikal-t1/ |
| H A D | ccu-pll.c | 322 #define CCU_PLL_DBGFS_BIT_ATTR(_name, _reg, _mask) \ argument
329 #define CCU_PLL_DBGFS_FLD_ATTR(_name, _reg, _lsb, _mask, _min, _max) \ argument
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| /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7915/ |
| H A D | testmode.c | 26 #define REG_BAND(_list, _reg) \ argument
29 #define REG_BAND_IDX(_list, _reg, _idx) \ argument
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-pic32-evic.c | 118 #define IRQ_REG_MASK(_hwirq, _reg, _mask) \ argument
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| /openbmc/linux/drivers/clk/meson/ |
| H A D | meson8b.c | 2685 #define MESON_GATE(_name, _reg, _bit) \ argument
2760 #define MESON_AIU_GLUE_GATE(_name, _reg, _bit) \ argument
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| H A D | axg.c | 1839 #define MESON_GATE(_name, _reg, _bit) \ argument
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| /openbmc/linux/drivers/soc/sunxi/ |
| H A D | sunxi_sram.c | 51 #define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \ argument
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| /openbmc/linux/arch/ia64/kernel/ |
| H A D | head.S | 64 #define SAVE_ONE_RR(num, _reg, _tmp) \ argument
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| /openbmc/linux/drivers/iio/imu/bno055/ |
| H A D | bno055_ser_core.c | 300 const void *_reg, size_t reg_size, in bno055_ser_read_reg()
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| /openbmc/linux/drivers/iio/addac/ |
| H A D | ad74115.c | 246 #define AD74115_FW_PROP(_name, _max, _reg, _mask) \ argument
254 #define AD74115_FW_PROP_TBL(_name, _tbl, _reg, _mask) \ argument
263 #define AD74115_FW_PROP_BOOL(_name, _reg, _mask) \ argument
271 #define AD74115_FW_PROP_BOOL_NEG(_name, _reg, _mask) \ argument
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| /openbmc/linux/drivers/clk/uniphier/ |
| H A D | clk-uniphier.h | 95 #define UNIPHIER_CLK_GATE(_name, _idx, _parent, _reg, _bit) \ argument
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