Home
last modified time | relevance | path

Searched defs:__mask (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_reg_defs.h98 #define REG_FIELD_PREP(__mask, __val) \ argument
115 #define REG_FIELD_PREP8(__mask, __val) \ argument
132 #define REG_FIELD_GET(__mask, __val) ((u32)FIELD_GET(__mask, __val)) argument
144 #define REG_FIELD_GET64(__mask, __val) ((u64)FIELD_GET(__mask, __val)) argument
187 #define REG_FIELD_PREP16(__mask, __val) \ argument
261 #define REG_FIELD_GET8(__mask, __val) ((u8)FIELD_GET(__mask, __val)) argument
/openbmc/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00reg.h206 #define FIELD_CHECK(__mask, __type) \ argument
211 #define FIELD8(__mask) \ argument
219 #define FIELD16(__mask) \ argument
227 #define FIELD32(__mask) \ argument
/openbmc/sdbusplus/include/sdbusplus/async/stdexec/__detail/
H A D__intrusive_ptr.hpp150 constexpr std::size_t __mask = 1ul << _Bit; in __set_bit_() local
160 constexpr std::size_t __mask = 1ul << _Bit; in __clear_bit_() local
/openbmc/linux/drivers/pinctrl/spear/
H A Dpinctrl-spear.h61 #define DEFINE_MUXREG(__pins, __muxreg, __mask, __ste) \ argument
70 #define DEFINE_2_MUXREG(__pins, __muxreg1, __muxreg2, __mask, __ste1, __ste2) \ argument
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display.h118 #define for_each_dbuf_slice_in_mask(__dev_priv, __slice, __mask) \ argument
226 #define for_each_pipe_masked(__dev_priv, __p, __mask) \ argument
234 #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ argument
H A Dintel_display_power.h166 #define for_each_power_domain(__domain, __mask) \ argument
/openbmc/linux/drivers/gpu/drm/i2c/
H A Dch7006_priv.h141 #define __mask(src, bitfield) \ macro
/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x.h97 #define DP(__mask, fmt, ...) \ argument
103 #define DP_AND(__mask, fmt, ...) \ argument
109 #define DP_CONT(__mask, fmt, ...) \ argument