/openbmc/qemu/hw/ssi/ |
H A D | pl022.c | 102 val = s->tx_fifo[i]; in pl022_xfer() 184 s->tx_fifo[s->tx_fifo_head] = value & s->bitmask; in pl022_write() 239 s->tx_fifo_head >= ARRAY_SIZE(s->tx_fifo) || in pl022_post_load() 264 VMSTATE_UINT16(tx_fifo[0], PL022State), 266 VMSTATE_UINT16(tx_fifo[1], PL022State), 268 VMSTATE_UINT16(tx_fifo[2], PL022State), 270 VMSTATE_UINT16(tx_fifo[3], PL022State), 272 VMSTATE_UINT16(tx_fifo[4], PL022State), 274 VMSTATE_UINT16(tx_fifo[5], PL022State), 276 VMSTATE_UINT16(tx_fifo[6], PL022State), [all …]
|
H A D | imx_spi.c | 66 VMSTATE_FIFO32(tx_fifo, IMXSPIState), 76 fifo32_reset(&s->tx_fifo); in imx_spi_txfifo_reset() 105 if (fifo32_is_empty(&s->tx_fifo)) { in imx_spi_update_irq() 111 if (fifo32_is_full(&s->tx_fifo)) { in imx_spi_update_irq() 170 while (!fifo32_is_empty(&s->tx_fifo)) { in imx_spi_flush_txfifo() 183 tx = fifo32_pop(&s->tx_fifo); in imx_spi_flush_txfifo() 224 if (fifo32_is_empty(&s->tx_fifo)) { in imx_spi_flush_txfifo() 362 if (fifo32_is_full(&s->tx_fifo)) { in imx_spi_write() 367 fifo32_push(&s->tx_fifo, (uint32_t)value); in imx_spi_write() 413 !fifo32_is_empty(&s->tx_fifo)) { in imx_spi_write() [all …]
|
H A D | sifive_spi.c | 64 fifo8_reset(&s->tx_fifo); in sifive_spi_txfifo_reset() 93 if (fifo8_num_used(&s->tx_fifo) < s->regs[R_TXMARK]) { in sifive_spi_update_irq() 135 while (!fifo8_is_empty(&s->tx_fifo)) { in sifive_spi_flush_txfifo() 136 tx = fifo8_pop(&s->tx_fifo); in sifive_spi_flush_txfifo() 194 if (fifo8_is_full(&s->tx_fifo)) { in sifive_spi_read() 261 if (!fifo8_is_full(&s->tx_fifo)) { in sifive_spi_write() 262 fifo8_push(&s->tx_fifo, (uint8_t)value); in sifive_spi_write() 327 fifo8_create(&s->tx_fifo, FIFO_CAPACITY); in sifive_spi_realize()
|
H A D | mss-spi.c | 89 fifo32_reset(&s->tx_fifo); in txfifo_reset() 230 while (!fifo32_is_empty(&s->tx_fifo) && s->frame_count) { in spi_flush_txfifo() 235 tx = fifo32_pop(&s->tx_fifo); in spi_flush_txfifo() 279 if (fifo32_num_used(&s->tx_fifo) == s->fifo_depth) { in spi_write() 283 fifo32_push(&s->tx_fifo, value); in spi_write() 284 if (fifo32_num_used(&s->tx_fifo) == (s->fifo_depth - 1)) { in spi_write() 286 } else if (fifo32_num_used(&s->tx_fifo) == s->fifo_depth) { in spi_write() 385 fifo32_create(&s->tx_fifo, FIFO_CAPACITY); in mss_spi_realize() 394 VMSTATE_FIFO32(tx_fifo, MSSSpiState),
|
H A D | xilinx_spi.c | 97 Fifo8 tx_fifo; member 104 fifo8_reset(&s->tx_fifo); in txfifo_reset() 179 while (!fifo8_is_empty(&s->tx_fifo)) { in spi_flush_txfifo() 180 tx = (uint32_t)fifo8_pop(&s->tx_fifo); in spi_flush_txfifo() 261 fifo8_push(&s->tx_fifo, (uint8_t)value); in spi_write() 262 if (fifo8_is_full(&s->tx_fifo)) { in spi_write() 348 fifo8_create(&s->tx_fifo, FIFO_CAPACITY); in xilinx_spi_realize() 357 VMSTATE_FIFO8(tx_fifo, XilinxSPI),
|
H A D | xilinx_spips.c | 308 fifo8_is_empty(&s->tx_fifo)) { in xilinx_spips_update_cs_lines() 617 if (fifo8_is_empty(&s->tx_fifo)) { in xilinx_spips_flush_txfifo() 623 tx_rx[i] = fifo8_pop(&s->tx_fifo); in xilinx_spips_flush_txfifo() 627 tx = fifo8_pop(&s->tx_fifo); in xilinx_spips_flush_txfifo() 636 tx = fifo8_pop(&s->tx_fifo); in xilinx_spips_flush_txfifo() 772 tx_data_bytes(&s->tx_fifo, 0, 4, false); in xilinx_spips_check_zero_pump() 781 (!fifo8_is_empty(&s->tx_fifo) && in xilinx_spips_check_flush() 1167 fifo8_reset(&s->tx_fifo); in lqspi_load_cache() 1193 fifo8_push(&s->tx_fifo, 0); in lqspi_load_cache() 1310 fifo8_create(&s->tx_fifo, xsc->tx_fifo_size); in xilinx_spips_realize() [all …]
|
H A D | xlnx-versal-ospi.c | 678 fifo8_reset(&s->tx_fifo); in ospi_tx_fifo_push_rd_op_addr() 681 fifo8_push(&s->tx_fifo, inst_code); in ospi_tx_fifo_push_rd_op_addr() 713 fifo8_push(&s->tx_fifo, 0); in ospi_tx_fifo_push_stig_rd_data() 750 fifo8_push(&s->tx_fifo, 0); in ospi_ind_read() 881 fifo8_reset(&s->tx_fifo); in ospi_transmit_wel() 882 fifo8_push(&s->tx_fifo, WREN); in ospi_transmit_wel() 909 fifo8_reset(&s->tx_fifo); in ospi_ind_write() 1019 fifo8_reset(&s->tx_fifo); in ospi_stig_cmd_exec() 1152 fifo8_push(&s->tx_fifo, 0); in ospi_do_dac_read() 1187 fifo8_reset(&s->tx_fifo); in ospi_do_dac_write() [all …]
|
H A D | ibex_spi_host.c | 124 fifo8_reset(&s->tx_fifo); in ibex_spi_txfifo_reset() 246 if (fifo8_is_empty(&s->tx_fifo)) { in ibex_spi_host_transfer() 255 tx = fifo8_pop(&s->tx_fifo); in ibex_spi_host_transfer() 277 data = FIELD_DP32(data, STATUS, TXQD, fifo8_num_used(&s->tx_fifo) / 4); in ibex_spi_host_transfer() 463 if (fifo8_is_full(&s->tx_fifo)) { in ibex_spi_host_write() 482 fifo8_push(&s->tx_fifo, (val32 & shift_mask) >> (i * 8)); in ibex_spi_host_write() 578 VMSTATE_FIFO8(tx_fifo, IbexSPIHostState), 611 fifo8_create(&s->tx_fifo, IBEX_SPI_HOST_TXFIFO_LEN); in ibex_spi_host_realize()
|
/openbmc/qemu/hw/net/ |
H A D | stellaris_enet.c | 75 uint8_t tx_fifo[2048]; member 124 if (s->tx_fifo_len > ARRAY_SIZE(s->tx_fifo)) { in stellaris_enet_post_load() 167 return s->tx_fifo[0] | (s->tx_fifo[1] << 8); in stellaris_txpacket_datalen() 186 framelen = MIN(framelen, ARRAY_SIZE(s->tx_fifo)); in stellaris_txpacket_complete() 210 memset(&s->tx_fifo[framelen + 2], 0, 60 - framelen); in stellaris_enet_send() 219 framelen = MIN(framelen, ARRAY_SIZE(s->tx_fifo) - 2); in stellaris_enet_send() 402 if (s->tx_fifo_len + 4 <= ARRAY_SIZE(s->tx_fifo)) { in stellaris_enet_write() 403 s->tx_fifo[s->tx_fifo_len++] = value; in stellaris_enet_write() 404 s->tx_fifo[s->tx_fifo_len++] = value >> 8; in stellaris_enet_write() 405 s->tx_fifo[s->tx_fifo_len++] = value >> 16; in stellaris_enet_write() [all …]
|
H A D | allwinner_emac.c | 149 fifo8_reset(&s->tx_fifo[chan]); in aw_emac_tx_reset() 343 fifo = &s->tx_fifo[chan]; in aw_emac_write() 376 fifo = &s->tx_fifo[s->tx_channel]; in aw_emac_write() 461 fifo8_create(&s->tx_fifo[0], TX_FIFO_SIZE); in aw_emac_realize() 462 fifo8_create(&s->tx_fifo[1], TX_FIFO_SIZE); in aw_emac_realize() 510 VMSTATE_STRUCT_ARRAY(tx_fifo, AwEmacState, NUM_TX_FIFOS, 1,
|
/openbmc/linux/drivers/net/ethernet/google/gve/ |
H A D | gve_tx.c | 186 gve_tx_free_fifo(&tx->tx_fifo, space_freed); in gve_clean_xdp_done() 220 gve_tx_fifo_release(priv, &tx->tx_fifo); in gve_tx_free_ring() 221 gve_unassign_qpl(priv, tx->tx_fifo.qpl->id); in gve_tx_free_ring() 222 tx->tx_fifo.qpl = NULL; in gve_tx_free_ring() 264 tx->tx_fifo.qpl = gve_assign_tx_qpl(priv, idx); in gve_tx_alloc_ring() 265 if (!tx->tx_fifo.qpl) in gve_tx_alloc_ring() 268 if (gve_tx_fifo_init(priv, &tx->tx_fifo)) in gve_tx_alloc_ring() 290 gve_tx_fifo_release(priv, &tx->tx_fifo); in gve_tx_alloc_ring() 293 gve_unassign_qpl(priv, tx->tx_fifo.qpl->id); in gve_tx_alloc_ring() 761 tx->tx_fifo.qpl->page_buses, in gve_tx_fill_xdp() [all …]
|
/openbmc/linux/drivers/media/pci/netup_unidvb/ |
H A D | netup_unidvb_i2c.c | 60 struct netup_i2c_fifo_regs tx_fifo; member 103 tmp = readw(&i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_interrupt() 104 writew(tmp & ~FIFO_IRQEN, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_interrupt() 125 writew(FIFO_RESET, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_reset() 127 writew(0x800, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_reset() 135 (readw(&i2c->regs->tx_fifo.stat_ctrl) & 0x3f); in netup_i2c_fifo_tx() 141 writeb(data, &i2c->regs->tx_fifo.data8); in netup_i2c_fifo_tx() 148 writew(readw(&i2c->regs->tx_fifo.stat_ctrl) | FIFO_IRQEN, in netup_i2c_fifo_tx() 149 &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_fifo_tx()
|
/openbmc/qemu/hw/i3c/ |
H A D | remote-i3c.c | 54 Fifo8 tx_fifo; member 89 return !fifo8_is_empty(&i3c->tx_fifo); in remote_i3c_tx_in_progress() 95 uint32_t num_bytes = fifo8_num_used(&i3c->tx_fifo); in remote_i3c_chr_send_bytes() 103 buf[i] = fifo8_pop(&i3c->tx_fifo); in remote_i3c_chr_send_bytes() 127 if (fifo8_num_free(&i3c->tx_fifo) < num_to_send) { in remote_i3c_tx_fifo_push() 130 num_to_push = fifo8_num_free(&i3c->tx_fifo); in remote_i3c_tx_fifo_push() 136 fifo8_push(&i3c->tx_fifo, data[i]); in remote_i3c_tx_fifo_push() 425 fifo8_create(&i3c->tx_fifo, i3c->cfg.buf_size); in remote_i3c_realize()
|
/openbmc/linux/drivers/usb/mtu3/ |
H A D | mtu3_core.c | 543 struct mtu3_fifo_info *tx_fifo; in get_ep_fifo_config() local 549 tx_fifo = &mtu->tx_fifo; in get_ep_fifo_config() 550 tx_fifo->base = 0; in get_ep_fifo_config() 551 tx_fifo->limit = fifosize / MTU3_EP_FIFO_UNIT; in get_ep_fifo_config() 552 bitmap_zero(tx_fifo->bitmap, MTU3_FIFO_BIT_SIZE); in get_ep_fifo_config() 562 tx_fifo = &mtu->tx_fifo; in get_ep_fifo_config() 563 tx_fifo->base = MTU3_U2_IP_EP0_FIFO_SIZE; in get_ep_fifo_config() 569 tx_fifo->base + tx_fifo->limit * MTU3_EP_FIFO_UNIT; in get_ep_fifo_config() 570 rx_fifo->limit = tx_fifo->limit; in get_ep_fifo_config() 576 __func__, tx_fifo->base, tx_fifo->limit, in get_ep_fifo_config() [all …]
|
/openbmc/u-boot/drivers/serial/ |
H A D | serial_xuartlite.c | 27 unsigned int tx_fifo; member 44 out_be32(®s->tx_fifo, ch & 0xff); in uartlite_serial_putc() 134 out_be32(®s->tx_fifo, ch & 0xff); in _debug_uart_putc()
|
/openbmc/qemu/hw/sd/ |
H A D | pxa2xx_mmci.c | 59 uint8_t tx_fifo[64]; member 75 return s->tx_start < ARRAY_SIZE(s->tx_fifo) in pxa2xx_mmci_vmstate_validate() 77 && s->tx_len <= ARRAY_SIZE(s->tx_fifo) in pxa2xx_mmci_vmstate_validate() 109 VMSTATE_UINT8_ARRAY(tx_fifo, PXA2xxMMCIState, 64), 187 sdbus_write_byte(&s->sdbus, s->tx_fifo[s->tx_start++]); in pxa2xx_mmci_fifo_update() 454 s->tx_fifo[(s->tx_start + (s->tx_len ++)) & 0x1f] = in pxa2xx_mmci_write() 540 memset(s->tx_fifo, 0, sizeof(s->tx_fifo)); in pxa2xx_mmci_reset()
|
/openbmc/u-boot/drivers/spi/ |
H A D | pic32_spi.c | 79 void (*tx_fifo)(struct pic32_spi_priv *); member 167 priv->tx_fifo = pic32_spi_tx_byte; in pic32_spi_set_word_size() 172 priv->tx_fifo = pic32_spi_tx_word; in pic32_spi_set_word_size() 177 priv->tx_fifo = pic32_spi_tx_dword; in pic32_spi_set_word_size() 266 priv->tx_fifo(priv); in pic32_spi_xfer()
|
/openbmc/linux/drivers/mailbox/ |
H A D | omap-mailbox.c | 108 struct omap_mbox_fifo tx_fifo; member 153 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; in mbox_fifo_write() 167 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; in mbox_fifo_full() 176 &mbox->tx_fifo : &mbox->rx_fifo; in ack_mbox_irq() 189 &mbox->tx_fifo : &mbox->rx_fifo; in is_mbox_irq() 204 &mbox->tx_fifo : &mbox->rx_fifo; in _omap_mbox_enable_irq() 216 &mbox->tx_fifo : &mbox->rx_fifo; in _omap_mbox_disable_irq() 791 fifo = &mbox->tx_fifo; in omap_mbox_probe()
|
/openbmc/linux/drivers/net/can/usb/ |
H A D | ucan.c | 152 u8 tx_fifo; /* Size of the transmission fifo */ member 270 u8 tx_fifo; member 333 up->context_array = kcalloc(up->device_info.tx_fifo, in ucan_alloc_context_array() 342 for (i = 0; i < up->device_info.tx_fifo; i++) { in ucan_alloc_context_array() 348 up->available_tx_urbs = up->device_info.tx_fifo; in ucan_alloc_context_array() 365 for (i = 0; i < up->device_info.tx_fifo; i++) { in ucan_alloc_context() 453 up->device_info.tx_fifo = device_info->tx_fifo; in ucan_parse_device_info() 654 if (echo_index >= up->device_info.tx_fifo) { in ucan_tx_complete_msg() 1476 if (ctl_msg_buffer->cmd_get_device_info.tx_fifo == 0) { in ucan_probe() 1492 ctl_msg_buffer->cmd_get_device_info.tx_fifo); in ucan_probe()
|
/openbmc/linux/drivers/staging/pi433/ |
H A D | pi433_if.c | 83 STRUCT_KFIFO_REC_1(MSG_FIFO_SIZE) tx_fifo; 572 (!kfifo_is_empty(&device->tx_fifo) || in pi433_tx_thread() 583 retval = kfifo_out(&device->tx_fifo, &tx_cfg, sizeof(tx_cfg)); in pi433_tx_thread() 591 retval = kfifo_out(&device->tx_fifo, &size, sizeof(size_t)); in pi433_tx_thread() 628 retval = kfifo_out(&device->tx_fifo, &device->buffer[position], in pi433_tx_thread() 750 if (kfifo_is_empty(&device->tx_fifo)) { in pi433_tx_thread() 847 available = kfifo_avail(&device->tx_fifo); in pi433_write() 855 retval = kfifo_in(&device->tx_fifo, &instance->tx_cfg, in pi433_write() 860 retval = kfifo_in(&device->tx_fifo, &count, sizeof(size_t)); in pi433_write() 864 retval = kfifo_from_user(&device->tx_fifo, buf, count, &copied); in pi433_write() [all …]
|
/openbmc/qemu/hw/char/ |
H A D | ibex_uart.c | 162 ret = qemu_chr_fe_write(&s->chr, s->tx_fifo, s->tx_level); in ibex_uart_xmit() 166 memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_level); in ibex_uart_xmit() 210 memcpy(s->tx_fifo + s->tx_level, buf, size); in uart_write_tx_fifo() 492 VMSTATE_UINT8_ARRAY(tx_fifo, IbexUartState,
|
H A D | cadence_uart.c | 317 ret = qemu_chr_fe_write(&s->chr, s->tx_fifo, s->tx_count); in cadence_uart_xmit() 321 memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_count); in cadence_uart_xmit() 355 memcpy(s->tx_fifo + s->tx_count, buf, size); in uart_write_tx_fifo() 609 VMSTATE_UINT8_ARRAY(tx_fifo, CadenceUARTState,
|
/openbmc/linux/drivers/spi/ |
H A D | spi-sh-msiof.c | 674 void (*tx_fifo)(struct sh_msiof_spi_priv *, in sh_msiof_spi_txrx_once() 702 tx_fifo(p, tx_buf, words, fifo_shift); in sh_msiof_spi_txrx_once() 988 tx_fifo = sh_msiof_spi_write_fifo_8; in sh_msiof_transfer_one() 993 tx_fifo = sh_msiof_spi_write_fifo_16u; in sh_msiof_transfer_one() 995 tx_fifo = sh_msiof_spi_write_fifo_16; in sh_msiof_transfer_one() 1004 tx_fifo = sh_msiof_spi_write_fifo_s32u; in sh_msiof_transfer_one() 1006 tx_fifo = sh_msiof_spi_write_fifo_s32; in sh_msiof_transfer_one() 1015 tx_fifo = sh_msiof_spi_write_fifo_32u; in sh_msiof_transfer_one() 1017 tx_fifo = sh_msiof_spi_write_fifo_32; in sh_msiof_transfer_one() 1029 n = sh_msiof_spi_txrx_once(p, tx_fifo, rx_fifo, tx_buf, rx_buf, in sh_msiof_transfer_one() [all …]
|
/openbmc/u-boot/drivers/i2c/ |
H A D | tegra_i2c.c | 153 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers() 158 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers() 171 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers() 266 writel(local, &control->tx_fifo); in send_recv_packets()
|
/openbmc/qemu/include/hw/ssi/ |
H A D | mss-spi.h | 50 Fifo32 tx_fifo; member
|