1*8d3dfb62SStrahinja Jankovic /* 2*8d3dfb62SStrahinja Jankovic * Allwinner SPI Bus Serial Interface registers definition 3*8d3dfb62SStrahinja Jankovic * 4*8d3dfb62SStrahinja Jankovic * Copyright (C) 2024 Strahinja Jankovic. <strahinja.p.jankovic@gmail.com> 5*8d3dfb62SStrahinja Jankovic * 6*8d3dfb62SStrahinja Jankovic * This program is free software; you can redistribute it and/or modify it 7*8d3dfb62SStrahinja Jankovic * under the terms of the GNU General Public License as published by the 8*8d3dfb62SStrahinja Jankovic * Free Software Foundation; either version 2 of the License, or 9*8d3dfb62SStrahinja Jankovic * (at your option) any later version. 10*8d3dfb62SStrahinja Jankovic * 11*8d3dfb62SStrahinja Jankovic * This program is distributed in the hope that it will be useful, but WITHOUT 12*8d3dfb62SStrahinja Jankovic * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13*8d3dfb62SStrahinja Jankovic * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14*8d3dfb62SStrahinja Jankovic * for more details. 15*8d3dfb62SStrahinja Jankovic * 16*8d3dfb62SStrahinja Jankovic * You should have received a copy of the GNU General Public License along 17*8d3dfb62SStrahinja Jankovic * with this program; if not, see <http://www.gnu.org/licenses/>. 18*8d3dfb62SStrahinja Jankovic * 19*8d3dfb62SStrahinja Jankovic * SPDX-License-Identifier: GPL-2.0-or-later 20*8d3dfb62SStrahinja Jankovic */ 21*8d3dfb62SStrahinja Jankovic 22*8d3dfb62SStrahinja Jankovic #ifndef ALLWINNER_A10_SPI_H 23*8d3dfb62SStrahinja Jankovic #define ALLWINNER_A10_SPI_H 24*8d3dfb62SStrahinja Jankovic 25*8d3dfb62SStrahinja Jankovic #include "hw/ssi/ssi.h" 26*8d3dfb62SStrahinja Jankovic #include "hw/sysbus.h" 27*8d3dfb62SStrahinja Jankovic #include "qemu/fifo8.h" 28*8d3dfb62SStrahinja Jankovic #include "qom/object.h" 29*8d3dfb62SStrahinja Jankovic 30*8d3dfb62SStrahinja Jankovic /** Size of register I/O address space used by SPI device */ 31*8d3dfb62SStrahinja Jankovic #define AW_A10_SPI_IOSIZE (0x1000) 32*8d3dfb62SStrahinja Jankovic 33*8d3dfb62SStrahinja Jankovic /** Total number of known registers */ 34*8d3dfb62SStrahinja Jankovic #define AW_A10_SPI_REGS_NUM (AW_A10_SPI_IOSIZE / sizeof(uint32_t)) 35*8d3dfb62SStrahinja Jankovic #define AW_A10_SPI_FIFO_SIZE (64) 36*8d3dfb62SStrahinja Jankovic #define AW_A10_SPI_CS_LINES_NR (4) 37*8d3dfb62SStrahinja Jankovic 38*8d3dfb62SStrahinja Jankovic #define TYPE_AW_A10_SPI "allwinner.spi" 39*8d3dfb62SStrahinja Jankovic OBJECT_DECLARE_SIMPLE_TYPE(AWA10SPIState, AW_A10_SPI) 40*8d3dfb62SStrahinja Jankovic 41*8d3dfb62SStrahinja Jankovic struct AWA10SPIState { 42*8d3dfb62SStrahinja Jankovic /*< private >*/ 43*8d3dfb62SStrahinja Jankovic SysBusDevice parent_obj; 44*8d3dfb62SStrahinja Jankovic 45*8d3dfb62SStrahinja Jankovic /*< public >*/ 46*8d3dfb62SStrahinja Jankovic MemoryRegion iomem; 47*8d3dfb62SStrahinja Jankovic SSIBus *bus; 48*8d3dfb62SStrahinja Jankovic qemu_irq irq; 49*8d3dfb62SStrahinja Jankovic qemu_irq cs_lines[AW_A10_SPI_CS_LINES_NR]; 50*8d3dfb62SStrahinja Jankovic 51*8d3dfb62SStrahinja Jankovic uint32_t regs[AW_A10_SPI_REGS_NUM]; 52*8d3dfb62SStrahinja Jankovic 53*8d3dfb62SStrahinja Jankovic Fifo8 rx_fifo; 54*8d3dfb62SStrahinja Jankovic Fifo8 tx_fifo; 55*8d3dfb62SStrahinja Jankovic }; 56*8d3dfb62SStrahinja Jankovic 57*8d3dfb62SStrahinja Jankovic #endif /* ALLWINNER_A10_SPI_H */ 58