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Searched refs:tg (Results 1 – 25 of 108) sorted by relevance

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/openbmc/linux/block/
H A Dblk-throttle.c123 if (tg) in sq_to_td()
248 qn->tg = tg; in throtl_qnode_init()
345 if (!tg) in throtl_pd_alloc()
357 throtl_qnode_init(&tg->qnode_on_self[rw], tg); in throtl_pd_alloc()
485 if (!tg->td->limit_valid[tg->td->limit_index]) in throtl_pd_offline()
1820 (tg->latency_target && tg->bio_cnt && in throtl_tg_is_idle()
1821 tg->bad_bio_cnt * 5 < tg->bio_cnt); in throtl_tg_is_idle()
1824 tg->avg_idletime, tg->idletime_threshold, tg->bad_bio_cnt, in throtl_tg_is_idle()
1825 tg->bio_cnt, ret, tg->td->scale); in throtl_tg_is_idle()
1867 if (!tg || !tg_to_blkg(tg)->parent) in throtl_hierarchy_can_upgrade()
[all …]
H A Dblk-throttle.h32 struct throtl_grp *tg; /* tg this qnode belongs to */ member
185 struct throtl_grp *tg = blkg_to_tg(bio->bi_blkg); in blk_should_throtl() local
191 blkg_rwstat_add(&tg->stat_bytes, bio->bi_opf, in blk_should_throtl()
194 blkg_rwstat_add(&tg->stat_ios, bio->bi_opf, 1); in blk_should_throtl()
198 if (tg->has_rules_iops[rw]) in blk_should_throtl()
201 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED)) in blk_should_throtl()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h117 #define DCE110TG_FROM_TG(tg)\ argument
128 struct timing_generator *tg,
136 struct timing_generator *tg,
154 struct timing_generator *tg,
170 struct timing_generator *tg,
179 struct timing_generator *tg,
185 struct timing_generator *tg,
202 struct timing_generator *tg,
208 struct timing_generator *tg,
212 struct timing_generator *tg,
[all …]
H A Ddce110_timing_generator.c66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument
146 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce110_timing_generator_enable_crtc()
217 tg->funcs->wait_for_vblank(tg);
218 tg->funcs->wait_for_vactive(tg);
238 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false); in dce110_timing_generator_disable_crtc()
271 dm_write_reg(tg->ctx, in program_horz_count_by_2()
342 result = tg->bp->funcs->program_crtc_timing(tg->bp, &bp_params); in dce110_timing_generator_program_timing_generator()
590 tg, &position); in dce110_timing_generator_get_crtc_scanoutpos()
1399 tg->funcs->get_position(tg, &position1); in dce110_timing_generator_is_counter_moving()
1400 tg->funcs->get_position(tg, &position2); in dce110_timing_generator_is_counter_moving()
[all …]
H A Ddce110_timing_generator_v.c42 tg->ctx->logger
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
140 struct timing_generator *tg) in dce110_timing_generator_v_is_in_vertical_blank() argument
242 struct timing_generator *tg, in dce110_timing_generator_v_program_blanking() argument
384 struct timing_generator *tg, in dce110_timing_generator_v_enable_advanced_request() argument
477 struct timing_generator *tg, in dce110_timing_generator_v_set_overscan_color_black() argument
613 struct timing_generator *tg) in dce110_timing_generator_v_did_triggered_reset_occur() argument
[all …]
H A Ddce110_hw_sequencer.c673 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local
691 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream()
1153 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_disable_stream() local
1435 pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true); in dce110_enable_stream_timing()
1676 tg->funcs->disable_vga(tg); in disable_vga_and_power_gate_all_controllers()
2474 if (!tg->funcs->is_counter_moving(tg)) { in wait_for_reset_trigger_to_occur()
2479 if (tg->funcs->did_triggered_reset_occur(tg)) { in wait_for_reset_trigger_to_occur()
2488 tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE); in wait_for_reset_trigger_to_occur()
2489 tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK); in wait_for_reset_trigger_to_occur()
2625 tg->funcs->disable_vga(tg); in init_hw()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dtiming_generator.h183 bool (*enable_crtc)(struct timing_generator *tg);
196 struct timing_generator *tg,
210 void (*set_blank)(struct timing_generator *tg,
212 bool (*is_blanked)(struct timing_generator *tg);
215 void (*set_colors)(struct timing_generator *tg,
223 void (*unlock)(struct timing_generator *tg);
224 void (*lock)(struct timing_generator *tg);
245 struct timing_generator *tg,
263 void (*tg_init)(struct timing_generator *tg);
287 bool (*get_crc)(struct timing_generator *tg,
[all …]
/openbmc/qemu/block/
H A Dthrottle-groups.c127 ThrottleGroup *tg = NULL; in throttle_group_incref() local
132 if (tg) { in throttle_group_incref()
142 return &tg->ts; in throttle_group_incref()
170 return tg->name; in throttle_group_get_name()
766 QLIST_INIT(&tg->head); in throttle_group_obj_init()
777 if (!tg->name && tg->parent_obj.parent) { in throttle_group_obj_complete()
781 assert(tg->name); in throttle_group_obj_complete()
794 throttle_config(&tg->ts, tg->clock_type, &cfg); in throttle_group_obj_complete()
808 g_free(tg->name); in throttle_group_obj_finalize()
837 cfg = &tg->ts.cfg; in throttle_group_set()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
114 tg, in dce120_timing_generator_validate_timing()
174 tg->ctx, in dce120_timing_generator_get_vblank_counter()
190 tg->ctx, in dce120_timing_generator_get_crtc_position()
217 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
224 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
235 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vactive()
375 tg->ctx, in dce120_timing_generator_did_triggered_reset_occur()
529 tg->ctx, in dce120_timing_generator_set_overscan_color_black()
676 tg->ctx, in dce120_tg_program_blank_color()
[all …]
/openbmc/linux/kernel/sched/
H A Dautogroup.h14 struct task_group *tg; member
21 extern void autogroup_free(struct task_group *tg);
23 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
25 return !!tg->autogroup; in task_group_is_autogroup()
31 autogroup_task_group(struct task_struct *p, struct task_group *tg) in autogroup_task_group() argument
36 if (enabled && task_wants_autogroup(p, tg)) in autogroup_task_group()
37 return p->signal->autogroup->tg; in autogroup_task_group()
39 return tg; in autogroup_task_group()
47 static inline void autogroup_free(struct task_group *tg) { } in autogroup_free() argument
48 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
[all …]
H A Dautogroup.c44 kfree(tg->autogroup); in autogroup_free()
53 ag->tg->rt_se = NULL; in autogroup_destroy()
54 ag->tg->rt_rq = NULL; in autogroup_destroy()
56 sched_release_group(ag->tg); in autogroup_destroy()
57 sched_destroy_group(ag->tg); in autogroup_destroy()
88 struct task_group *tg; in autogroup_create() local
94 if (IS_ERR(tg)) in autogroup_create()
100 ag->tg = tg; in autogroup_create()
109 free_rt_sched_group(tg); in autogroup_create()
113 tg->autogroup = ag; in autogroup_create()
[all …]
H A Drt.c198 if (tg->rt_se) in unregister_rt_sched_group()
208 if (tg->rt_rq) in free_rt_sched_group()
210 if (tg->rt_se) in free_rt_sched_group()
227 rt_rq->tg = tg; in init_tg_rt_entry()
252 if (!tg->rt_rq) in alloc_rt_sched_group()
255 if (!tg->rt_se) in alloc_rt_sched_group()
553 tg = list_entry_rcu(tg->list.next, in next_task_group()
558 tg = NULL; in next_task_group()
560 return tg; in next_task_group()
2791 if (tg == d->tg) { in tg_rt_schedulable()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_timing_generator.c91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
124 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
133 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request()
174 dm_write_reg(tg->ctx, addr, value); in dce60_timing_generator_enable_advanced_request()
175 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
186 value = dm_read_reg(tg->ctx, addr); in dce60_is_tg_enabled()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
114 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
1338 tg->funcs->lock(tg); in dcn10_init_pipes()
1340 tg->funcs->lock(tg); in dcn10_init_pipes()
1341 tg->funcs->set_blank(tg, true); in dcn10_init_pipes()
1392 tg->funcs->tg_init(tg); in dcn10_init_pipes()
1402 pipe_ctx->stream_res.tg = tg; in dcn10_init_pipes()
1420 tg->funcs->unlock(tg); in dcn10_init_pipes()
1429 tg->funcs->init_odm(tg); in dcn10_init_pipes()
1432 tg->funcs->tg_init(tg); in dcn10_init_pipes()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c177 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
182 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
272 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw()
280 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
281 tg->funcs->lock(tg); in dcn201_init_hw()
307 pipe_ctx->stream_res.tg = tg; in dcn201_init_hw()
333 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
334 tg->funcs->unlock(tg); in dcn201_init_hw()
349 tg->funcs->tg_init(tg); in dcn201_init_hw()
543 pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg); in dcn201_pipe_control_lock()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c303 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank()
636 if (tg && tg->funcs->disable_phantom_crtc) in dcn20_disable_plane()
637 tg->funcs->disable_phantom_crtc(tg); in dcn20_disable_plane()
1857 tg->funcs->enable_crtc(tg); in dcn20_program_front_end_for_ctx()
2843 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2850 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2851 tg->funcs->lock(tg); in dcn20_fpga_init_hw()
2877 pipe_ctx->stream_res.tg = tg; in dcn20_fpga_init_hw()
2905 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2906 tg->funcs->unlock(tg); in dcn20_fpga_init_hw()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/openbmc/linux/drivers/iio/chemical/
H A Dsgp40.c167 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; in sgp40_measure_resistance_raw() local
174 tg.rht_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
175 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
179 tg.temp_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
180 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
184 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); in sgp40_measure_resistance_raw()
185 if (ret != sizeof(tg)) { in sgp40_measure_resistance_raw()
186 dev_warn(data->dev, "i2c_master_send ret: %d sizeof: %zu\n", ret, sizeof(tg)); in sgp40_measure_resistance_raw()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c485 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
487 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
548 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
887 inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst; in dp_set_test_pattern()
895 pipe_ctx->stream_res.tg); in dp_set_test_pattern()
898 pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
917 pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
918 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
920 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
922 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hwseq.c197 if (tg) { in dcn31_init_hw()
198 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw()
199 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw()
518 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe()
519 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe()
521 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe()
522 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe()
524 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn31_reset_back_end_for_pipe()
529 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
530 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
[all …]
/openbmc/linux/drivers/firmware/efi/libstub/
H A Darm64.c61 u64 tg; in check_platform_features() local
75 tg = (read_cpuid(ID_AA64MMFR0_EL1) >> ID_AA64MMFR0_EL1_TGRAN_SHIFT) & 0xf; in check_platform_features()
76 if (tg < ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN || tg > ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX) { in check_platform_features()
/openbmc/linux/arch/powerpc/kernel/
H A Dsmp.c842 tg->property = thread_group_array[i]; in parse_thread_groups()
845 total_threads = tg->nr_groups * tg->threads_per_group; in parse_thread_groups()
850 tg->thread_list[j] = thread_list[j]; in parse_thread_groups()
880 for (i = 0; i < tg->nr_groups; i++) { in get_cpu_thread_group_start()
886 if (tg->thread_list[idx] == hw_cpu_id) in get_cpu_thread_group_start()
900 struct thread_groups *tg = NULL; in get_thread_groups() local
917 tg = &cpu_tgl->property_tgs[i]; in get_thread_groups()
922 if (!tg) in get_thread_groups()
926 return tg; in get_thread_groups()
956 struct thread_groups *tg = NULL; in init_thread_group_cache_map() local
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.c182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
209 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_pipe() local
214 if (!abm && !tg && !panel_cntl) in dcn21_set_pipe()
217 otg_inst = tg->inst; in dcn21_set_pipe()
244 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_backlight_level() local
248 if (!abm && !tg && !panel_cntl) in dcn21_set_backlight_level()
251 otg_inst = tg->inst; in dcn21_set_backlight_level()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
137 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
143 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
144 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
194 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
195 pipe_ctx->stream_res.tg, in dcn314_update_odm()
199 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
200 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm()
406 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
418 pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()

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